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ar71xx: enable UART function for early_printk/console
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30909 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -0,0 +1,18 @@
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--- a/arch/mips/ath79/dev-common.c
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+++ b/arch/mips/ath79/dev-common.c
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@@ -87,6 +87,15 @@ void __init ath79_register_uart(void)
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if (IS_ERR(clk))
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panic("unable to get UART clock, err=%ld", PTR_ERR(clk));
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+ if (soc_is_ar71xx())
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+ ath79_gpio_function_enable(AR71XX_GPIO_FUNC_UART_EN);
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+ else if (soc_is_ar724x())
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+ ath79_gpio_function_enable(AR724X_GPIO_FUNC_UART_EN);
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+ else if (soc_is_ar913x())
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+ ath79_gpio_function_enable(AR913X_GPIO_FUNC_UART_EN);
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+ else if (soc_is_ar933x())
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+ ath79_gpio_function_enable(AR933X_GPIO_FUNC_UART_EN);
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+
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if (soc_is_ar71xx() ||
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soc_is_ar724x() ||
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soc_is_ar913x() ||
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@ -0,0 +1,61 @@
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--- a/arch/mips/ath79/early_printk.c
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+++ b/arch/mips/ath79/early_printk.c
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@@ -56,6 +56,46 @@ static void prom_putchar_dummy(unsigned
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/* nothing to do */
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}
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+static void prom_enable_uart(u32 id)
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+{
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+ void __iomem *gpio_base;
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+ u32 uart_en;
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+ u32 t;
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+
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+ switch (id) {
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+ case REV_ID_MAJOR_AR71XX:
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+ uart_en = AR71XX_GPIO_FUNC_UART_EN;
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+ break;
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+
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+ case REV_ID_MAJOR_AR7240:
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+ case REV_ID_MAJOR_AR7241:
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+ case REV_ID_MAJOR_AR7242:
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+ uart_en = AR724X_GPIO_FUNC_UART_EN;
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+ break;
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+
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+ case REV_ID_MAJOR_AR913X:
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+ uart_en = AR913X_GPIO_FUNC_UART_EN;
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+ break;
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+
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+ case REV_ID_MAJOR_AR9330:
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+ case REV_ID_MAJOR_AR9331:
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+ uart_en = AR933X_GPIO_FUNC_UART_EN;
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+ break;
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+
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+ case REV_ID_MAJOR_AR9341:
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+ case REV_ID_MAJOR_AR9342:
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+ case REV_ID_MAJOR_AR9344:
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+ /* TODO */
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+ default:
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+ return;
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+ }
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+
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+ gpio_base = (void __iomem *)(KSEG1ADDR(AR71XX_GPIO_BASE));
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+ t = __raw_readl(gpio_base + AR71XX_GPIO_REG_FUNC);
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+ t |= uart_en;
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+ __raw_writel(t, gpio_base + AR71XX_GPIO_REG_FUNC);
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+}
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+
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static void prom_putchar_init(void)
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{
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void __iomem *base;
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@@ -84,8 +124,10 @@ static void prom_putchar_init(void)
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default:
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_prom_putchar = prom_putchar_dummy;
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- break;
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+ return;
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}
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+
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+ prom_enable_uart(id);
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}
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void prom_putchar(unsigned char ch)
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@ -0,0 +1,18 @@
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--- a/arch/mips/ath79/dev-common.c
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+++ b/arch/mips/ath79/dev-common.c
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@@ -87,6 +87,15 @@ void __init ath79_register_uart(void)
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if (IS_ERR(clk))
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panic("unable to get UART clock, err=%ld", PTR_ERR(clk));
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+ if (soc_is_ar71xx())
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+ ath79_gpio_function_enable(AR71XX_GPIO_FUNC_UART_EN);
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+ else if (soc_is_ar724x())
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+ ath79_gpio_function_enable(AR724X_GPIO_FUNC_UART_EN);
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+ else if (soc_is_ar913x())
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+ ath79_gpio_function_enable(AR913X_GPIO_FUNC_UART_EN);
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+ else if (soc_is_ar933x())
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+ ath79_gpio_function_enable(AR933X_GPIO_FUNC_UART_EN);
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+
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if (soc_is_ar71xx() ||
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soc_is_ar724x() ||
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soc_is_ar913x() ||
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@ -0,0 +1,61 @@
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--- a/arch/mips/ath79/early_printk.c
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+++ b/arch/mips/ath79/early_printk.c
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@@ -56,6 +56,46 @@ static void prom_putchar_dummy(unsigned
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/* nothing to do */
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}
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+static void prom_enable_uart(u32 id)
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+{
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+ void __iomem *gpio_base;
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+ u32 uart_en;
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+ u32 t;
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+
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+ switch (id) {
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+ case REV_ID_MAJOR_AR71XX:
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+ uart_en = AR71XX_GPIO_FUNC_UART_EN;
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+ break;
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+
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+ case REV_ID_MAJOR_AR7240:
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+ case REV_ID_MAJOR_AR7241:
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+ case REV_ID_MAJOR_AR7242:
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+ uart_en = AR724X_GPIO_FUNC_UART_EN;
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+ break;
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+
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+ case REV_ID_MAJOR_AR913X:
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+ uart_en = AR913X_GPIO_FUNC_UART_EN;
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+ break;
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+
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+ case REV_ID_MAJOR_AR9330:
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+ case REV_ID_MAJOR_AR9331:
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+ uart_en = AR933X_GPIO_FUNC_UART_EN;
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+ break;
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+
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+ case REV_ID_MAJOR_AR9341:
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+ case REV_ID_MAJOR_AR9342:
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+ case REV_ID_MAJOR_AR9344:
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+ /* TODO */
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+ default:
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+ return;
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+ }
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+
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+ gpio_base = (void __iomem *)(KSEG1ADDR(AR71XX_GPIO_BASE));
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+ t = __raw_readl(gpio_base + AR71XX_GPIO_REG_FUNC);
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+ t |= uart_en;
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+ __raw_writel(t, gpio_base + AR71XX_GPIO_REG_FUNC);
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+}
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+
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static void prom_putchar_init(void)
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{
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void __iomem *base;
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@@ -84,8 +124,10 @@ static void prom_putchar_init(void)
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default:
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_prom_putchar = prom_putchar_dummy;
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- break;
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+ return;
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}
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+
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+ prom_enable_uart(id);
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}
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void prom_putchar(unsigned char ch)
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