mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-28 07:58:38 +02:00
jz4740-mmc: Stability and speed improvements.
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parent
24c8a8bc38
commit
ddd8424992
@ -118,28 +118,37 @@ struct jz4740_mmc_host {
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int max_clock;
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uint32_t cmdat;
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uint16_t irq_mask;
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spinlock_t lock;
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struct timer_list clock_timer;
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struct timer_list timeout_timer;
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unsigned waiting:1;
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};
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static void jz4740_mmc_cmd_done(struct jz4740_mmc_host *host);
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static void jz4740_mmc_enable_irq(struct jz4740_mmc_host *host, unsigned int irq)
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{
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uint16_t mask;
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mask = readw(host->base + JZ_REG_MMC_IMASK);
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mask &= ~irq;
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writew(mask, host->base + JZ_REG_MMC_IMASK);
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unsigned long flags;
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spin_lock_irqsave(&host->lock, flags);
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host->irq_mask &= ~irq;
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writew(host->irq_mask, host->base + JZ_REG_MMC_IMASK);
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spin_unlock_irqrestore(&host->lock, flags);
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}
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static void jz4740_mmc_disable_irq(struct jz4740_mmc_host *host, unsigned int irq)
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{
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uint16_t mask;
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mask = readw(host->base + JZ_REG_MMC_IMASK);
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mask |= irq;
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writew(mask, host->base + JZ_REG_MMC_IMASK);
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unsigned long flags;
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spin_lock_irqsave(&host->lock, flags);
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host->irq_mask |= irq;
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writew(host->irq_mask, host->base + JZ_REG_MMC_IMASK);
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spin_unlock_irqrestore(&host->lock, flags);
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}
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static void jz4740_mmc_clock_enable(struct jz4740_mmc_host *host, bool start_transfer)
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@ -177,48 +186,81 @@ static void jz4740_mmc_request_done(struct jz4740_mmc_host *host)
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spin_lock_irqsave(&host->lock, flags);
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req = host->req;
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host->req = NULL;
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host->waiting = 0;
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spin_unlock_irqrestore(&host->lock, flags);
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if (!unlikely(req))
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return;
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if (req->cmd->error != 0)
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/* if (req->cmd->error != 0) {
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printk("error\n");
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jz4740_mmc_reset(host);
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}*/
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mmc_request_done(host->mmc, req);
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}
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static void jz4740_mmc_write_data(struct jz4740_mmc_host *host, struct mmc_data *data) {
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struct scatterlist *sg;
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uint32_t *sg_pointer;
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int i, status;
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int status;
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size_t i, j;
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uint16_t snob;
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for (sg = data->sg; sg; sg = sg_next(sg)) {
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sg_pointer = page_address(sg_page(sg)) + sg->offset;
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i = 0;
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while (i < sg->length) {
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sg_pointer = sg_virt(sg);
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i = sg->length / 4;
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j = i >> 3;
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i = i & 0x7;
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while (j) {
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do {
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status = readl(host->base + JZ_REG_MMC_STATUS);
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if (status & JZ_MMC_STATUS_WRITE_ERROR_MASK)
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goto err;
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} while (status & JZ_MMC_STATUS_DATA_FIFO_FULL);
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writel(*sg_pointer, host->base + JZ_REG_MMC_TXFIFO);
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++sg_pointer;
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i += 4;
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status = readw(host->base + JZ_REG_MMC_IREG);
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} while (!(status & JZ_MMC_IRQ_TXFIFO_WR_REQ));
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writew(JZ_MMC_IRQ_TXFIFO_WR_REQ, host->base + JZ_REG_MMC_IREG);
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writel(sg_pointer[0], host->base + JZ_REG_MMC_TXFIFO);
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writel(sg_pointer[1], host->base + JZ_REG_MMC_TXFIFO);
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writel(sg_pointer[2], host->base + JZ_REG_MMC_TXFIFO);
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writel(sg_pointer[3], host->base + JZ_REG_MMC_TXFIFO);
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writel(sg_pointer[4], host->base + JZ_REG_MMC_TXFIFO);
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writel(sg_pointer[5], host->base + JZ_REG_MMC_TXFIFO);
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writel(sg_pointer[6], host->base + JZ_REG_MMC_TXFIFO);
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writel(sg_pointer[7], host->base + JZ_REG_MMC_TXFIFO);
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sg_pointer += 8;
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--j;
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}
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if (i) {
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do {
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status = readw(host->base + JZ_REG_MMC_IREG);
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} while (!(status & JZ_MMC_IRQ_TXFIFO_WR_REQ));
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writew(JZ_MMC_IRQ_TXFIFO_WR_REQ, host->base + JZ_REG_MMC_IREG);
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while (i) {
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writel(*sg_pointer, host->base + JZ_REG_MMC_TXFIFO);
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++sg_pointer;
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--i;
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}
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}
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data->bytes_xfered += sg->length;
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}
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status = readl(host->base + JZ_REG_MMC_STATUS);
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if (status & JZ_MMC_STATUS_WRITE_ERROR_MASK)
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goto err;
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writew(JZ_MMC_IRQ_TXFIFO_WR_REQ, host->base + JZ_REG_MMC_IREG);
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do {
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status = readl(host->base + JZ_REG_MMC_STATUS);
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} while ((status & JZ_MMC_STATUS_DATA_TRAN_DONE) == 0);
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writew(JZ_MMC_IRQ_DATA_TRAN_DONE, host->base + JZ_REG_MMC_IREG);
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return;
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err:
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if(status & (JZ_MMC_STATUS_TIMEOUT_WRITE)) {
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host->cmd->error = -ETIMEDOUT;
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host->req->cmd->error = -ETIMEDOUT;
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data->error = -ETIMEDOUT;
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} else {
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host->cmd->error = -EILSEQ;
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host->req->cmd->error = -EILSEQ;
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data->error = -EILSEQ;
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}
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}
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@ -238,30 +280,48 @@ static void jz4740_mmc_timeout(unsigned long data)
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spin_unlock_irqrestore(&host->lock, flags);
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host->cmd->error = -ETIMEDOUT;
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host->req->cmd->error = -ETIMEDOUT;
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jz4740_mmc_request_done(host);
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}
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static void jz4740_mmc_read_data(struct jz4740_mmc_host *host, struct mmc_data *data) {
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struct scatterlist *sg;
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void *sg_pointer;
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uint32_t *sg_pointer;
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uint32_t d;
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int status = 0;
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size_t i = 0;
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size_t i, j;
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for (sg = data->sg; sg; sg = sg_next(sg)) {
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sg_pointer = sg_virt(sg);
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i = sg->length;
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j = i >> 5;
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i = i & 0x1f;
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while (j) {
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do {
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status = readw(host->base + JZ_REG_MMC_IREG);
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} while (!(status & JZ_MMC_IRQ_RXFIFO_RD_REQ));
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writew(JZ_MMC_IRQ_RXFIFO_RD_REQ, host->base + JZ_REG_MMC_IREG);
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sg_pointer[0] = readl(host->base + JZ_REG_MMC_RXFIFO);
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sg_pointer[1] = readl(host->base + JZ_REG_MMC_RXFIFO);
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sg_pointer[2] = readl(host->base + JZ_REG_MMC_RXFIFO);
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sg_pointer[3] = readl(host->base + JZ_REG_MMC_RXFIFO);
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sg_pointer[4] = readl(host->base + JZ_REG_MMC_RXFIFO);
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sg_pointer[5] = readl(host->base + JZ_REG_MMC_RXFIFO);
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sg_pointer[6] = readl(host->base + JZ_REG_MMC_RXFIFO);
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sg_pointer[7] = readl(host->base + JZ_REG_MMC_RXFIFO);
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sg_pointer += 8;
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--j;
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}
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while (i >= 4) {
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do {
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status = readl(host->base + JZ_REG_MMC_STATUS);
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if (status & JZ_MMC_STATUS_READ_ERROR_MASK)
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goto err;
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} while (status & JZ_MMC_STATUS_DATA_FIFO_EMPTY);
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d = readl(host->base + JZ_REG_MMC_RXFIFO);
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memcpy(sg_pointer, &d, 4);
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} while ((status & JZ_MMC_STATUS_DATA_FIFO_EMPTY));
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sg_pointer += 4;
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*sg_pointer = readl(host->base + JZ_REG_MMC_RXFIFO);
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++sg_pointer;
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i -= 4;
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}
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if (i > 0) {
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@ -273,6 +333,9 @@ static void jz4740_mmc_read_data(struct jz4740_mmc_host *host, struct mmc_data *
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flush_dcache_page(sg_page(sg));
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}
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if (status & JZ_MMC_STATUS_READ_ERROR_MASK)
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goto err;
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/* For whatever reason there is sometime one word more in the fifo then
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* requested */
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while ((status & JZ_MMC_STATUS_DATA_FIFO_EMPTY) == 0) {
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@ -283,10 +346,10 @@ static void jz4740_mmc_read_data(struct jz4740_mmc_host *host, struct mmc_data *
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err:
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if(status & JZ_MMC_STATUS_TIMEOUT_READ) {
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host->cmd->error = -ETIMEDOUT;
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host->req->cmd->error = -ETIMEDOUT;
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data->error = -ETIMEDOUT;
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} else {
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host->cmd->error = -EILSEQ;
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host->req->cmd->error = -EILSEQ;
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data->error = -EILSEQ;
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}
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}
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@ -306,25 +369,37 @@ static irqreturn_t jz_mmc_irq_worker(int irq, void *devid)
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static irqreturn_t jz_mmc_irq(int irq, void *devid)
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{
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struct jz4740_mmc_host *host = devid;
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uint16_t irq_reg, status;
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uint16_t irq_reg, status, tmp;
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unsigned long flags;
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irqreturn_t ret = IRQ_HANDLED;
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if (!host->req || !host->cmd) {
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return IRQ_HANDLED;
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irq_reg = readw(host->base + JZ_REG_MMC_IREG);
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tmp = irq_reg;
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spin_lock(&host->lock);
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irq_reg &= ~host->irq_mask;
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spin_unlock(&host->lock);
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if (irq_reg & JZ_MMC_IRQ_SDIO) {
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writew(JZ_MMC_IRQ_SDIO, host->base + JZ_REG_MMC_IREG);
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mmc_signal_sdio_irq(host->mmc);
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}
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if (!host->req || !host->cmd) {
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goto handled;
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}
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spin_lock_irqsave(&host->lock, flags);
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if (!host->waiting) {
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spin_unlock_irqrestore(&host->lock, flags);
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return IRQ_HANDLED;
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goto handled;
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}
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host->waiting = 0;
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spin_unlock_irqrestore(&host->lock, flags);
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del_timer(&host->timeout_timer);
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irq_reg = readw(host->base + JZ_REG_MMC_IREG);
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status = readl(host->base + JZ_REG_MMC_STATUS);
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if (status & JZ_MMC_STATUS_TIMEOUT_RES) {
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@ -345,11 +420,10 @@ static irqreturn_t jz_mmc_irq(int irq, void *devid)
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ret = IRQ_WAKE_THREAD;
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}
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if (irq_reg & JZ_MMC_IRQ_SDIO) {
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writew(JZ_MMC_IRQ_SDIO, host->base + JZ_REG_MMC_IREG);
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mmc_signal_sdio_irq(host->mmc);
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}
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return ret;
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handled:
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writew(0xff, host->base + JZ_REG_MMC_IREG);
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return IRQ_HANDLED;
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}
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static int jz4740_mmc_set_clock_rate(struct jz4740_mmc_host *host, int rate) {
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@ -431,7 +505,7 @@ static void jz4740_mmc_send_command(struct jz4740_mmc_host *host, struct mmc_com
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host->waiting = 1;
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jz4740_mmc_clock_enable(host, 1);
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mod_timer(&host->timeout_timer, HZ);
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mod_timer(&host->timeout_timer, 4*HZ);
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}
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static void jz4740_mmc_cmd_done(struct jz4740_mmc_host *host)
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@ -456,6 +530,7 @@ static void jz4740_mmc_cmd_done(struct jz4740_mmc_host *host)
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do {
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status = readl(host->base + JZ_REG_MMC_STATUS);
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} while ((status & JZ_MMC_STATUS_PRG_DONE) == 0);
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writew(JZ_MMC_IRQ_PRG_DONE, host->base + JZ_REG_MMC_IREG);
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}
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jz4740_mmc_request_done(host);
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@ -718,6 +793,7 @@ static int __devinit jz4740_mmc_probe(struct platform_device* pdev)
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host->pdata = pdata;
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host->max_clock = JZ_MMC_CLK_RATE;
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spin_lock_init(&host->lock);
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host->irq_mask = 0xffff;
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host->card_detect_irq = gpio_to_irq(pdata->gpio_card_detect);
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