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Code

ar71xx: fix QCA955X_EHCI_SIZE

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33360 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2012-09-10 14:32:54 +00:00
parent ea689bc52e
commit e1ee097247
3 changed files with 3 additions and 3 deletions
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2
target/linux/ar71xx/patches-3.3/167-MIPS-ath79-add-USB-controller-registration-code-for-.patch
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@ -86,7 +86,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+#define QCA955X_EHCI0_BASE 0x1b000000
+#define QCA955X_EHCI1_BASE 0x1b400000
+#define QCA955X_EHCI_SIZE 0x1000
+#define QCA955X_EHCI_SIZE 0x200
+
/*
* DDR_CTRL block

2
target/linux/ar71xx/patches-3.3/168-MIPS-ath79-add-WMAC-registration-code-for-the-QCA955.patch
View File

@ -67,4 +67,4 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+#define QCA955X_WMAC_SIZE 0x20000
#define QCA955X_EHCI0_BASE 0x1b000000
#define QCA955X_EHCI1_BASE 0x1b400000
#define QCA955X_EHCI_SIZE 0x1000
#define QCA955X_EHCI_SIZE 0x200

2
target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch
View File

@ -39,7 +39,7 @@
@@ -112,6 +122,8 @@
#define QCA955X_EHCI0_BASE 0x1b000000
#define QCA955X_EHCI1_BASE 0x1b400000
#define QCA955X_EHCI_SIZE 0x1000
#define QCA955X_EHCI_SIZE 0x200
+#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)
+#define QCA955X_GMAC_SIZE 0x40