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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-06-28 19:19:30 +03:00

ramips: convert to use {e,o}hci-platform driver

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34843 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2012-12-22 12:11:08 +00:00
parent c4dd6997f2
commit e8e5a1eaf8
8 changed files with 96 additions and 523 deletions

View File

@ -1,20 +0,0 @@
/*
* Platform data definition for built-in EHCI controller of the
* Ralink RT3662/RT3883 SoCs
*
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _RT3883_EHCI_PLATFORM_H
#define _RT3883_EHCI_PLATFORM_H
struct rt3883_ehci_platform_data {
void (*start_hw)(void);
void (*stop_hw)(void);
};
#endif /* _RT3883_EHCI_PLATFORM_H */

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@ -1,20 +0,0 @@
/*
* Platform data definition for built-in OHCI controller of the
* Ralink RT3662/RT3883 SoCs
*
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _RT3883_OHCI_PLATFORM_H
#define _RT3883_OHCI_PLATFORM_H
struct rt3883_ohci_platform_data {
void (*start_hw)(void);
void (*stop_hw)(void);
};
#endif /* _RT3883_OHCI_PLATFORM_H */

View File

@ -18,6 +18,8 @@
#include <linux/rt2x00_platform.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/usb/ehci_pdriver.h>
#include <linux/usb/ohci_pdriver.h>
#include <asm/addrspace.h>
@ -27,8 +29,6 @@
#include <ramips_eth_platform.h>
#include <rt305x_esw_platform.h>
#include <rt3883_ehci_platform.h>
#include <rt3883_ohci_platform.h>
static struct resource rt305x_flash0_resources[] = {
{
@ -297,60 +297,63 @@ static struct platform_device rt305x_dwc_otg_device = {
}
};
static atomic_t rt3352_usb_use_count = ATOMIC_INIT(0);
static atomic_t rt3352_usb_pwr_ref = ATOMIC_INIT(0);
static void rt3352_usb_host_start(void)
static int rt3352_usb_power_on(struct platform_device *pdev)
{
u32 t;
if (atomic_inc_return(&rt3352_usb_use_count) != 1)
return;
if (atomic_inc_return(&rt3352_usb_pwr_ref) == 1) {
u32 t;
t = rt305x_sysc_rr(RT3352_SYSC_REG_USB_PS);
t = rt305x_sysc_rr(RT3352_SYSC_REG_USB_PS);
/* enable clock for port0's and port1's phys */
t = rt305x_sysc_rr(RT3352_SYSC_REG_CLKCFG1);
t = t | RT3352_CLKCFG1_UPHY0_CLK_EN | RT3352_CLKCFG1_UPHY1_CLK_EN;
rt305x_sysc_wr(t, RT3352_SYSC_REG_CLKCFG1);
mdelay(500);
/* enable clock for port0's and port1's phys */
t = rt305x_sysc_rr(RT3352_SYSC_REG_CLKCFG1);
t |= RT3352_CLKCFG1_UPHY0_CLK_EN | RT3352_CLKCFG1_UPHY1_CLK_EN;
rt305x_sysc_wr(t, RT3352_SYSC_REG_CLKCFG1);
mdelay(500);
/* pull USBHOST and USBDEV out from reset */
t = rt305x_sysc_rr(RT3352_SYSC_REG_RSTCTRL);
t &= ~(RT3352_RSTCTRL_UHST | RT3352_RSTCTRL_UDEV);
rt305x_sysc_wr(t, RT3352_SYSC_REG_RSTCTRL);
mdelay(500);
/* pull USBHOST and USBDEV out from reset */
t = rt305x_sysc_rr(RT3352_SYSC_REG_RSTCTRL);
t &= ~(RT3352_RSTCTRL_UHST | RT3352_RSTCTRL_UDEV);
rt305x_sysc_wr(t, RT3352_SYSC_REG_RSTCTRL);
mdelay(500);
/* enable host mode */
t = rt305x_sysc_rr(RT3352_SYSC_REG_SYSCFG1);
t |= RT3352_SYSCFG1_USB0_HOST_MODE;
rt305x_sysc_wr(t, RT3352_SYSC_REG_SYSCFG1);
/* enable host mode */
t = rt305x_sysc_rr(RT3352_SYSC_REG_SYSCFG1);
t |= RT3352_SYSCFG1_USB0_HOST_MODE;
rt305x_sysc_wr(t, RT3352_SYSC_REG_SYSCFG1);
t = rt305x_sysc_rr(RT3352_SYSC_REG_USB_PS);
t = rt305x_sysc_rr(RT3352_SYSC_REG_USB_PS);
}
return 0;
}
static void rt3352_usb_host_stop(void)
static void rt3352_usb_power_off(struct platform_device *pdev)
{
u32 t;
if (atomic_dec_return(&rt3352_usb_use_count) != 0)
return;
if (atomic_dec_return(&rt3352_usb_pwr_ref) == 0) {
u32 t;
/* put USBHOST and USBDEV into reset */
t = rt305x_sysc_rr(RT3352_SYSC_REG_RSTCTRL);
t |= RT3352_RSTCTRL_UHST | RT3352_RSTCTRL_UDEV;
rt305x_sysc_wr(t, RT3352_SYSC_REG_RSTCTRL);
udelay(10000);
/* put USBHOST and USBDEV into reset */
t = rt305x_sysc_rr(RT3352_SYSC_REG_RSTCTRL);
t |= RT3352_RSTCTRL_UHST | RT3352_RSTCTRL_UDEV;
rt305x_sysc_wr(t, RT3352_SYSC_REG_RSTCTRL);
udelay(10000);
/* disable clock for port0's and port1's phys*/
t = rt305x_sysc_rr(RT3352_SYSC_REG_CLKCFG1);
t &= ~(RT3352_CLKCFG1_UPHY0_CLK_EN | RT3352_CLKCFG1_UPHY1_CLK_EN);
rt305x_sysc_wr(t, RT3352_SYSC_REG_CLKCFG1);
udelay(10000);
/* disable clock for port0's and port1's phys*/
t = rt305x_sysc_rr(RT3352_SYSC_REG_CLKCFG1);
t &= ~(RT3352_CLKCFG1_UPHY0_CLK_EN | RT3352_CLKCFG1_UPHY1_CLK_EN);
rt305x_sysc_wr(t, RT3352_SYSC_REG_CLKCFG1);
udelay(10000);
}
}
static struct rt3883_ehci_platform_data rt3352_ehci_data = {
.start_hw = rt3352_usb_host_start,
.stop_hw = rt3352_usb_host_stop,
static struct usb_ehci_pdata rt3352_ehci_data = {
.port_power_off = 1,
.power_on = rt3352_usb_power_on,
.power_off = rt3352_usb_power_off,
};
static struct resource rt3352_ehci_resources[] = {
@ -367,7 +370,7 @@ static struct resource rt3352_ehci_resources[] = {
static u64 rt3352_ehci_dmamask = DMA_BIT_MASK(32);
static struct platform_device rt3352_ehci_device = {
.name = "rt3883-ehci",
.name = "ehci-platform",
.id = -1,
.resource = rt3352_ehci_resources,
.num_resources = ARRAY_SIZE(rt3352_ehci_resources),
@ -390,14 +393,14 @@ static struct resource rt3352_ohci_resources[] = {
},
};
static struct rt3883_ohci_platform_data rt3352_ohci_data = {
.start_hw = rt3352_usb_host_start,
.stop_hw = rt3352_usb_host_stop,
static struct usb_ohci_pdata rt3352_ohci_data = {
.power_on = rt3352_usb_power_on,
.power_off = rt3352_usb_power_off,
};
static u64 rt3352_ohci_dmamask = DMA_BIT_MASK(32);
static struct platform_device rt3352_ohci_device = {
.name = "rt3883-ohci",
.name = "ohci-platform",
.id = -1,
.resource = rt3352_ohci_resources,
.num_resources = ARRAY_SIZE(rt3352_ohci_resources),

View File

@ -19,13 +19,13 @@
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/rt2x00_platform.h>
#include <linux/usb/ehci_pdriver.h>
#include <linux/usb/ohci_pdriver.h>
#include <asm/addrspace.h>
#include <asm/mach-ralink/rt3883.h>
#include <asm/mach-ralink/rt3883_regs.h>
#include <asm/mach-ralink/rt3883_ehci_platform.h>
#include <asm/mach-ralink/rt3883_ohci_platform.h>
#include <asm/mach-ralink/ramips_nand_platform.h>
#include "devices.h"
@ -123,67 +123,63 @@ void __init rt3883_register_pflash(unsigned int id)
rt3883_flash_instance++;
}
static atomic_t rt3883_usb_use_count = ATOMIC_INIT(0);
static atomic_t rt3883_usb_pwr_ref = ATOMIC_INIT(0);
static void rt3883_usb_host_start(void)
static int rt3883_usb_power_on(struct platform_device *pdev)
{
u32 t;
if (atomic_inc_return(&rt3883_usb_use_count) != 1)
return;
if (atomic_inc_return(&rt3883_usb_pwr_ref) == 1) {
u32 t;
t = rt3883_sysc_rr(RT3883_SYSC_REG_USB_PS);
t = rt3883_sysc_rr(RT3883_SYSC_REG_USB_PS);
#if 0
/* put the HOST controller into reset */
t = rt3883_sysc_rr(RT3883_SYSC_REG_RSTCTRL);
t |= RT3883_RSTCTRL_UHST;
rt3883_sysc_wr(t, RT3883_SYSC_REG_RSTCTRL);
#endif
/* enable clock for port0's and port1's phys */
t = rt3883_sysc_rr(RT3883_SYSC_REG_CLKCFG1);
t |= RT3883_CLKCFG1_UPHY0_CLK_EN | RT3883_CLKCFG1_UPHY1_CLK_EN;
rt3883_sysc_wr(t, RT3883_SYSC_REG_CLKCFG1);
mdelay(500);
/* enable clock for port0's and port1's phys */
t = rt3883_sysc_rr(RT3883_SYSC_REG_CLKCFG1);
t = t | RT3883_CLKCFG1_UPHY0_CLK_EN | RT3883_CLKCFG1_UPHY1_CLK_EN;
rt3883_sysc_wr(t, RT3883_SYSC_REG_CLKCFG1);
mdelay(500);
/* pull USBHOST and USBDEV out from reset */
t = rt3883_sysc_rr(RT3883_SYSC_REG_RSTCTRL);
t &= ~(RT3883_RSTCTRL_UHST | RT3883_RSTCTRL_UDEV);
rt3883_sysc_wr(t, RT3883_SYSC_REG_RSTCTRL);
mdelay(500);
/* pull USBHOST and USBDEV out from reset */
t = rt3883_sysc_rr(RT3883_SYSC_REG_RSTCTRL);
t &= ~(RT3883_RSTCTRL_UHST | RT3883_RSTCTRL_UDEV);
rt3883_sysc_wr(t, RT3883_SYSC_REG_RSTCTRL);
mdelay(500);
/* enable host mode */
t = rt3883_sysc_rr(RT3883_SYSC_REG_SYSCFG1);
t |= RT3883_SYSCFG1_USB0_HOST_MODE;
rt3883_sysc_wr(t, RT3883_SYSC_REG_SYSCFG1);
/* enable host mode */
t = rt3883_sysc_rr(RT3883_SYSC_REG_SYSCFG1);
t |= RT3883_SYSCFG1_USB0_HOST_MODE;
rt3883_sysc_wr(t, RT3883_SYSC_REG_SYSCFG1);
t = rt3883_sysc_rr(RT3883_SYSC_REG_USB_PS);
}
t = rt3883_sysc_rr(RT3883_SYSC_REG_USB_PS);
return 0;
}
static void rt3883_usb_host_stop(void)
static void rt3883_usb_power_off(struct platform_device *pdev)
{
u32 t;
if (atomic_dec_return(&rt3883_usb_pwr_ref) == 0) {
u32 t;
if (atomic_dec_return(&rt3883_usb_use_count) != 0)
return;
/* put USBHOST and USBDEV into reset */
t = rt3883_sysc_rr(RT3883_SYSC_REG_RSTCTRL);
t |= RT3883_RSTCTRL_UHST | RT3883_RSTCTRL_UDEV;
rt3883_sysc_wr(t, RT3883_SYSC_REG_RSTCTRL);
udelay(10000);
/* put USBHOST and USBDEV into reset */
t = rt3883_sysc_rr(RT3883_SYSC_REG_RSTCTRL);
t |= RT3883_RSTCTRL_UHST | RT3883_RSTCTRL_UDEV;
rt3883_sysc_wr(t, RT3883_SYSC_REG_RSTCTRL);
udelay(10000);
/* disable clock for port0's and port1's phys*/
t = rt3883_sysc_rr(RT3883_SYSC_REG_CLKCFG1);
t &= ~(RT3883_CLKCFG1_UPHY0_CLK_EN | RT3883_CLKCFG1_UPHY1_CLK_EN);
rt3883_sysc_wr(t, RT3883_SYSC_REG_CLKCFG1);
udelay(10000);
/* disable clock for port0's and port1's phys*/
t = rt3883_sysc_rr(RT3883_SYSC_REG_CLKCFG1);
t &= ~(RT3883_CLKCFG1_UPHY0_CLK_EN |
RT3883_CLKCFG1_UPHY1_CLK_EN);
rt3883_sysc_wr(t, RT3883_SYSC_REG_CLKCFG1);
udelay(10000);
}
}
static struct rt3883_ehci_platform_data rt3883_ehci_data = {
.start_hw = rt3883_usb_host_start,
.stop_hw = rt3883_usb_host_stop,
static struct usb_ehci_pdata rt3883_ehci_data = {
.port_power_off = 1,
.power_on = rt3883_usb_power_on,
.power_off = rt3883_usb_power_off,
};
static struct resource rt3883_ehci_resources[] = {
@ -200,7 +196,7 @@ static struct resource rt3883_ehci_resources[] = {
static u64 rt3883_ehci_dmamask = DMA_BIT_MASK(32);
static struct platform_device rt3883_ehci_device = {
.name = "rt3883-ehci",
.name = "ehci-platform",
.id = -1,
.resource = rt3883_ehci_resources,
.num_resources = ARRAY_SIZE(rt3883_ehci_resources),
@ -223,14 +219,14 @@ static struct resource rt3883_ohci_resources[] = {
},
};
static struct rt3883_ohci_platform_data rt3883_ohci_data = {
.start_hw = rt3883_usb_host_start,
.stop_hw = rt3883_usb_host_stop,
static struct usb_ohci_pdata rt3883_ohci_data = {
.power_on = rt3883_usb_power_on,
.power_off = rt3883_usb_power_off,
};
static u64 rt3883_ohci_dmamask = DMA_BIT_MASK(32);
static struct platform_device rt3883_ohci_device = {
.name = "rt3883-ohci",
.name = "ohci-platform",
.id = -1,
.resource = rt3883_ohci_resources,
.num_resources = ARRAY_SIZE(rt3883_ohci_resources),

View File

@ -1,162 +0,0 @@
/*
* Bus Glue for the built-in EHCI controller of the Ralink RT3662/RT3883 SoCs
*
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
*
* Parts of this file are based on Ralink's 2.6.21 BSP
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <asm/mach-ralink/rt3883.h>
#include <asm/mach-ralink/rt3883_ehci_platform.h>
static int ehci_rt3883_init(struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
int ret;
ehci->caps = hcd->regs;
ehci->regs = hcd->regs +
HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
dbg_hcs_params(ehci, "reset");
dbg_hcc_params(ehci, "reset");
ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
ehci->sbrn = 0x20;
ehci_reset(ehci);
ret = ehci_init(hcd);
if (ret)
return ret;
ehci_port_power(ehci, 0);
return 0;
}
static const struct hc_driver ehci_rt3883_hc_driver = {
.description = hcd_name,
.product_desc = "Ralink RT3883 built-in EHCI controller",
.hcd_priv_size = sizeof(struct ehci_hcd),
.irq = ehci_irq,
.flags = HCD_MEMORY | HCD_USB2,
.reset = ehci_rt3883_init,
.start = ehci_run,
.stop = ehci_stop,
.shutdown = ehci_shutdown,
.urb_enqueue = ehci_urb_enqueue,
.urb_dequeue = ehci_urb_dequeue,
.endpoint_disable = ehci_endpoint_disable,
.endpoint_reset = ehci_endpoint_reset,
.get_frame_number = ehci_get_frame,
.hub_status_data = ehci_hub_status_data,
.hub_control = ehci_hub_control,
.relinquish_port = ehci_relinquish_port,
.port_handed_over = ehci_port_handed_over,
.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
};
static int ehci_rt3883_probe(struct platform_device *pdev)
{
struct rt3883_ehci_platform_data *pdata;
struct usb_hcd *hcd;
struct resource *res;
int irq;
int ret;
if (usb_disabled())
return -ENODEV;
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!res) {
dev_dbg(&pdev->dev, "no IRQ specified for %s\n",
dev_name(&pdev->dev));
return -ENODEV;
}
irq = res->start;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_dbg(&pdev->dev, "no base address specified for %s\n",
dev_name(&pdev->dev));
return -ENODEV;
}
hcd = usb_create_hcd(&ehci_rt3883_hc_driver, &pdev->dev,
dev_name(&pdev->dev));
if (!hcd)
return -ENOMEM;
hcd->rsrc_start = res->start;
hcd->rsrc_len = res->end - res->start + 1;
if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
dev_dbg(&pdev->dev, "controller already in use\n");
ret = -EBUSY;
goto err_put_hcd;
}
hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
if (!hcd->regs) {
dev_dbg(&pdev->dev, "error mapping memory\n");
ret = -EFAULT;
goto err_release_region;
}
pdata = pdev->dev.platform_data;
if (pdata && pdata->start_hw)
pdata->start_hw();
ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
if (ret)
goto err_iounmap;
return 0;
err_iounmap:
iounmap(hcd->regs);
err_release_region:
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
err_put_hcd:
usb_put_hcd(hcd);
return ret;
}
static int ehci_rt3883_remove(struct platform_device *pdev)
{
struct usb_hcd *hcd = platform_get_drvdata(pdev);
struct rt3883_ehci_platform_data *pdata;
usb_remove_hcd(hcd);
iounmap(hcd->regs);
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
usb_put_hcd(hcd);
pdata = pdev->dev.platform_data;
if (pdata && pdata->stop_hw)
pdata->stop_hw();
return 0;
}
static struct platform_driver ehci_rt3883_driver = {
.probe = ehci_rt3883_probe,
.remove = ehci_rt3883_remove,
.driver = {
.owner = THIS_MODULE,
.name = "rt3883-ehci",
}
};
MODULE_ALIAS("platform:rt3883-ehci");

View File

@ -1,161 +0,0 @@
/*
* Bus Glue for the built-in OHCI controller of the Ralink RT3662/RT3883 SoCs
*
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
*
* Parts of this file are based on Ralink's 2.6.21 BSP
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <asm/mach-ralink/rt3883.h>
#include <asm/mach-ralink/rt3883_ohci_platform.h>
static int __devinit ohci_rt3883_start(struct usb_hcd *hcd)
{
struct ohci_hcd *ohci = hcd_to_ohci(hcd);
int ret;
ret = ohci_init(ohci);
if (ret < 0)
return ret;
ret = ohci_run(ohci);
if (ret < 0)
goto err;
return 0;
err:
ohci_stop(hcd);
return ret;
}
static const struct hc_driver ohci_rt3883_hc_driver = {
.description = hcd_name,
.product_desc = "Ralink RT3883 built-in OHCI controller",
.hcd_priv_size = sizeof(struct ohci_hcd),
.irq = ohci_irq,
.flags = HCD_USB11 | HCD_MEMORY,
.start = ohci_rt3883_start,
.stop = ohci_stop,
.shutdown = ohci_shutdown,
.urb_enqueue = ohci_urb_enqueue,
.urb_dequeue = ohci_urb_dequeue,
.endpoint_disable = ohci_endpoint_disable,
/*
* scheduling support
*/
.get_frame_number = ohci_get_frame,
/*
* root hub support
*/
.hub_status_data = ohci_hub_status_data,
.hub_control = ohci_hub_control,
.start_port_reset = ohci_start_port_reset,
};
static int ohci_rt3883_probe(struct platform_device *pdev)
{
struct rt3883_ohci_platform_data *pdata;
struct usb_hcd *hcd;
struct resource *res;
int irq;
int ret;
if (usb_disabled())
return -ENODEV;
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!res) {
dev_dbg(&pdev->dev, "no IRQ specified for %s\n",
dev_name(&pdev->dev));
return -ENODEV;
}
irq = res->start;
hcd = usb_create_hcd(&ohci_rt3883_hc_driver,
&pdev->dev, dev_name(&pdev->dev));
if (!hcd)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_dbg(&pdev->dev, "no base address specified for %s\n",
dev_name(&pdev->dev));
ret = -ENODEV;
goto err_put_hcd;
}
hcd->rsrc_start = res->start;
hcd->rsrc_len = res->end - res->start + 1;
if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
dev_dbg(&pdev->dev, "controller already in use\n");
ret = -EBUSY;
goto err_put_hcd;
}
hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
if (!hcd->regs) {
dev_dbg(&pdev->dev, "error mapping memory\n");
ret = -EFAULT;
goto err_release_region;
}
pdata = pdev->dev.platform_data;
if (pdata && pdata->start_hw)
pdata->start_hw();
ohci_hcd_init(hcd_to_ohci(hcd));
ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
if (ret)
goto err_stop_hcd;
return 0;
err_stop_hcd:
iounmap(hcd->regs);
err_release_region:
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
err_put_hcd:
usb_put_hcd(hcd);
return ret;
}
static int ohci_rt3883_remove(struct platform_device *pdev)
{
struct usb_hcd *hcd = platform_get_drvdata(pdev);
struct rt3883_ohci_platform_data *pdata;
usb_remove_hcd(hcd);
iounmap(hcd->regs);
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
usb_put_hcd(hcd);
pdata = pdev->dev.platform_data;
if (pdata && pdata->stop_hw)
pdata->stop_hw();
return 0;
}
static struct platform_driver ohci_rt3883_driver = {
.probe = ohci_rt3883_probe,
.remove = ohci_rt3883_remove,
.shutdown = usb_hcd_platform_shutdown,
.driver = {
.name = "rt3883-ohci",
.owner = THIS_MODULE,
},
};
MODULE_ALIAS("platform:rt3883-ohci");

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@ -1,32 +0,0 @@
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -235,6 +235,15 @@ config USB_EHCI_ATH79
Enables support for the built-in EHCI controller present
on the Atheros AR7XXX/AR9XXX SoCs.
+config USB_EHCI_RT3883
+ bool "EHCI support for Ralink RT3662/RT3883 SoCs"
+ depends on USB_EHCI_HCD && ( SOC_RT3883 || SOC_RT305X )
+ select USB_EHCI_ROOT_HUB_TT
+ default y
+ ---help---
+ Enables support for the built-in EHCI controller present
+ on the Ralink RT3883 SoC.
+
config USB_OXU210HP_HCD
tristate "OXU210HP HCD support"
depends on USB
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1339,6 +1339,11 @@ MODULE_LICENSE ("GPL");
#define PLATFORM_DRIVER ehci_platform_driver
#endif
+#ifdef CONFIG_USB_EHCI_RT3883
+#include "ehci-rt3883.c"
+#define PLATFORM_DRIVER ehci_rt3883_driver
+#endif
+
#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
!defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
!defined(XILINX_OF_PLATFORM_DRIVER)

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@ -1,31 +0,0 @@
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -342,6 +342,14 @@ config USB_OHCI_ATH79
Enables support for the built-in OHCI controller present on the
Atheros AR71XX/AR7240 SoCs.
+config USB_OHCI_RT3883
+ bool "USB OHCI support for the Ralink RT3883 SoCs"
+ depends on USB_OHCI_HCD && ( SOC_RT3883 || SOC_RT305X )
+ default y
+ help
+ Enables support for the built-in OHCI controller present on the
+ Ralink RT3883 SoC.
+
config USB_OHCI_HCD_PPC_SOC
bool "OHCI support for on-chip PPC USB controller"
depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx)
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1120,6 +1120,11 @@ MODULE_LICENSE ("GPL");
#define PLATFORM_DRIVER ohci_platform_driver
#endif
+#ifdef CONFIG_USB_OHCI_RT3883
+#include "ohci-rt3883.c"
+#define PLATFORM_DRIVER ohci_rt3883_driver
+#endif
+
#if !defined(PCI_DRIVER) && \
!defined(PLATFORM_DRIVER) && \
!defined(OMAP1_PLATFORM_DRIVER) && \