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ar71xx: fix PHY setup on TL-MR3020 (fixes #11572)

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32093 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
nbd 2012-06-06 17:24:12 +00:00
parent 62977660d8
commit eed1fe974e
1 changed files with 4 additions and 0 deletions
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4
target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c
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@ -12,6 +12,7 @@
#include <linux/gpio.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
@ -99,6 +100,8 @@ static void __init tl_mr3020_setup(void)
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_setup_ar933x_phy4_switch(false, true);
ath79_register_m25p80(&tl_mr3020_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3020_leds_gpio),
tl_mr3020_leds_gpio);
@ -114,6 +117,7 @@ static void __init tl_mr3020_setup(void)
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_eth0_data.phy_mask = BIT(0);
ath79_register_wmac(ee, mac);
}