1
0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-12-26 00:26:47 +02:00
openwrt-xburst/target/linux/adm5120/patches-3.3/a01-adm5120-core-build-error-fixes.patch
juhosg 05735d303b adm5120: add 3.3 support
Partially based on the 3.1 patches by Hartmut Knaack <knaack.h [at] gmx.de>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31474 3c298f89-4303-0410-b956-a3cf2f4a3e73
2012-04-25 12:57:33 +00:00

111 lines
3.5 KiB
Diff

--- a/arch/mips/adm5120/common/platform.c
+++ b/arch/mips/adm5120/common/platform.c
@@ -18,6 +18,7 @@
#include <linux/gpio.h>
#include <linux/irq.h>
#include <linux/slab.h>
+#include <linux/export.h>
#include <asm/bootinfo.h>
--- a/arch/mips/adm5120/common/clock.c
+++ b/arch/mips/adm5120/common/clock.c
@@ -33,7 +33,7 @@ static struct clk uart_clk = {
struct clk *clk_get(struct device *dev, const char *id)
{
- char *name = dev_name(dev);
+ const char *name = dev_name(dev);
if (!strcmp(name, "apb:uart0") || !strcmp(name, "apb:uart1"))
return &uart_clk;
--- a/arch/mips/pci/pci-adm5120.c
+++ b/arch/mips/pci/pci-adm5120.c
@@ -49,7 +49,7 @@
static unsigned int adm5120_pci_nr_irqs __initdata;
static struct adm5120_pci_irq *adm5120_pci_irq_map __initdata;
-static spinlock_t pci_lock = SPIN_LOCK_UNLOCKED;
+static DEFINE_SPINLOCK(pci_lock);
/* -------------------------------------------------------------------------*/
--- a/arch/mips/adm5120/common/irq.c
+++ b/arch/mips/adm5120/common/irq.c
@@ -23,9 +23,9 @@
#include <asm/mach-adm5120/adm5120_defs.h>
-static void adm5120_intc_irq_unmask(unsigned int irq);
-static void adm5120_intc_irq_mask(unsigned int irq);
-static int adm5120_intc_irq_set_type(unsigned int irq, unsigned int flow_type);
+static void adm5120_intc_irq_unmask(struct irq_data *d);
+static void adm5120_intc_irq_mask(struct irq_data *d);
+static int adm5120_intc_irq_set_type(struct irq_data *d, unsigned int flow_type);
static inline void intc_write_reg(unsigned int reg, u32 val)
{
@@ -43,10 +43,10 @@ static inline u32 intc_read_reg(unsigned
static struct irq_chip adm5120_intc_irq_chip = {
.name = "INTC",
- .unmask = adm5120_intc_irq_unmask,
- .mask = adm5120_intc_irq_mask,
- .mask_ack = adm5120_intc_irq_mask,
- .set_type = adm5120_intc_irq_set_type
+ .irq_unmask = adm5120_intc_irq_unmask,
+ .irq_mask = adm5120_intc_irq_mask,
+ .irq_mask_ack = adm5120_intc_irq_mask,
+ .irq_set_type = adm5120_intc_irq_set_type
};
static struct irqaction adm5120_intc_irq_action = {
@@ -54,20 +54,19 @@ static struct irqaction adm5120_intc_irq
.name = "cascade [INTC]"
};
-static void adm5120_intc_irq_unmask(unsigned int irq)
+static void adm5120_intc_irq_unmask(struct irq_data *d)
{
- irq -= ADM5120_INTC_IRQ_BASE;
- intc_write_reg(INTC_REG_IRQ_ENABLE, 1 << irq);
+ intc_write_reg(INTC_REG_IRQ_ENABLE, 1 << (d->irq - ADM5120_INTC_IRQ_BASE));
}
-static void adm5120_intc_irq_mask(unsigned int irq)
+static void adm5120_intc_irq_mask(struct irq_data *d)
{
- irq -= ADM5120_INTC_IRQ_BASE;
- intc_write_reg(INTC_REG_IRQ_DISABLE, 1 << irq);
+ intc_write_reg(INTC_REG_IRQ_DISABLE, 1 << (d->irq - ADM5120_INTC_IRQ_BASE));
}
-static int adm5120_intc_irq_set_type(unsigned int irq, unsigned int flow_type)
+static int adm5120_intc_irq_set_type(struct irq_data *d, unsigned int flow_type)
{
+ unsigned int irq = d->irq;
unsigned int sense;
unsigned long mode;
int err = 0;
@@ -105,10 +104,6 @@ static int adm5120_intc_irq_set_type(uns
mode &= ~(1 << (irq - ADM5120_INTC_IRQ_BASE));
intc_write_reg(INTC_REG_INT_MODE, mode);
- /* fallthrough */
- default:
- irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
- irq_desc[irq].status |= sense;
break;
}
@@ -162,8 +157,7 @@ static void __init adm5120_intc_irq_init
for (i = ADM5120_INTC_IRQ_BASE;
i <= ADM5120_INTC_IRQ_BASE + INTC_IRQ_LAST;
i++) {
- irq_desc[i].status = INTC_IRQ_STATUS;
- set_irq_chip_and_handler(i, &adm5120_intc_irq_chip,
+ irq_set_chip_and_handler(i, &adm5120_intc_irq_chip,
handle_level_irq);
}