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e0e5bd88de
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@22463 3c298f89-4303-0410-b956-a3cf2f4a3e73
166 lines
4.6 KiB
Diff
166 lines
4.6 KiB
Diff
From ebf176a38105200dca51a96ad1535c8d56235653 Mon Sep 17 00:00:00 2001
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From: Lars-Peter Clausen <lars@metafoo.de>
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Date: Sat, 19 Jun 2010 04:08:10 +0000
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Subject: [PATCH] MIPS: JZ4740: Add clocksource/clockevent support.
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Add clocksource and clockevent support for the timer/counter unit on
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JZ4740 SoCs.
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Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
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Cc: linux-mips@linux-mips.org
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Cc: linux-kernel@vger.kernel.org
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Patchwork: https://patchwork.linux-mips.org/patch/1397/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/jz4740/time.c | 144 +++++++++++++++++++++++++++++++++++++++++++++++
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1 files changed, 144 insertions(+), 0 deletions(-)
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create mode 100644 arch/mips/jz4740/time.c
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--- /dev/null
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+++ b/arch/mips/jz4740/time.c
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@@ -0,0 +1,144 @@
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+/*
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+ * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
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+ * JZ4740 platform time support
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ *
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+ * You should have received a copy of the GNU General Public License along
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+ * with this program; if not, write to the Free Software Foundation, Inc.,
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+ * 675 Mass Ave, Cambridge, MA 02139, USA.
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+ *
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+ */
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+
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+#include <linux/interrupt.h>
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+#include <linux/kernel.h>
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+#include <linux/time.h>
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+
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+#include <linux/clockchips.h>
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+
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+#include <asm/mach-jz4740/irq.h>
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+#include <asm/time.h>
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+
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+#include "clock.h"
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+#include "timer.h"
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+
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+#define TIMER_CLOCKEVENT 0
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+#define TIMER_CLOCKSOURCE 1
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+
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+static uint16_t jz4740_jiffies_per_tick;
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+
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+static cycle_t jz4740_clocksource_read(struct clocksource *cs)
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+{
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+ return jz4740_timer_get_count(TIMER_CLOCKSOURCE);
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+}
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+
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+static struct clocksource jz4740_clocksource = {
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+ .name = "jz4740-timer",
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+ .rating = 200,
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+ .read = jz4740_clocksource_read,
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+ .mask = CLOCKSOURCE_MASK(16),
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+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
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+};
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+
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+static irqreturn_t jz4740_clockevent_irq(int irq, void *devid)
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+{
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+ struct clock_event_device *cd = devid;
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+
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+ jz4740_timer_ack_full(TIMER_CLOCKEVENT);
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+
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+ if (cd->mode != CLOCK_EVT_MODE_PERIODIC)
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+ jz4740_timer_disable(TIMER_CLOCKEVENT);
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+
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+ cd->event_handler(cd);
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static void jz4740_clockevent_set_mode(enum clock_event_mode mode,
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+ struct clock_event_device *cd)
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+{
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+ switch (mode) {
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+ case CLOCK_EVT_MODE_PERIODIC:
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+ jz4740_timer_set_count(TIMER_CLOCKEVENT, 0);
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+ jz4740_timer_set_period(TIMER_CLOCKEVENT, jz4740_jiffies_per_tick);
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+ case CLOCK_EVT_MODE_RESUME:
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+ jz4740_timer_irq_full_enable(TIMER_CLOCKEVENT);
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+ jz4740_timer_enable(TIMER_CLOCKEVENT);
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+ break;
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+ case CLOCK_EVT_MODE_ONESHOT:
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+ case CLOCK_EVT_MODE_SHUTDOWN:
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+ jz4740_timer_disable(TIMER_CLOCKEVENT);
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+ break;
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+ default:
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+ break;
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+ }
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+}
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+
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+static int jz4740_clockevent_set_next(unsigned long evt,
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+ struct clock_event_device *cd)
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+{
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+ jz4740_timer_set_count(TIMER_CLOCKEVENT, 0);
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+ jz4740_timer_set_period(TIMER_CLOCKEVENT, evt);
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+ jz4740_timer_enable(TIMER_CLOCKEVENT);
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+
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+ return 0;
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+}
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+
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+static struct clock_event_device jz4740_clockevent = {
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+ .name = "jz4740-timer",
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+ .features = CLOCK_EVT_FEAT_PERIODIC,
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+ .set_next_event = jz4740_clockevent_set_next,
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+ .set_mode = jz4740_clockevent_set_mode,
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+ .rating = 200,
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+ .irq = JZ4740_IRQ_TCU0,
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+};
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+
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+static struct irqaction timer_irqaction = {
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+ .handler = jz4740_clockevent_irq,
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+ .flags = IRQF_PERCPU | IRQF_TIMER,
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+ .name = "jz4740-timerirq",
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+ .dev_id = &jz4740_clockevent,
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+};
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+
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+void __init plat_time_init(void)
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+{
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+ int ret;
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+ uint32_t clk_rate;
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+ uint16_t ctrl;
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+
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+ jz4740_timer_init();
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+
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+ clk_rate = jz4740_clock_bdata.ext_rate >> 4;
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+ jz4740_jiffies_per_tick = DIV_ROUND_CLOSEST(clk_rate, HZ);
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+
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+ clockevent_set_clock(&jz4740_clockevent, clk_rate);
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+ jz4740_clockevent.min_delta_ns = clockevent_delta2ns(100, &jz4740_clockevent);
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+ jz4740_clockevent.max_delta_ns = clockevent_delta2ns(0xffff, &jz4740_clockevent);
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+ jz4740_clockevent.cpumask = cpumask_of(0);
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+
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+ clockevents_register_device(&jz4740_clockevent);
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+
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+ clocksource_set_clock(&jz4740_clocksource, clk_rate);
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+ ret = clocksource_register(&jz4740_clocksource);
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+
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+ if (ret)
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+ printk(KERN_ERR "Failed to register clocksource: %d\n", ret);
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+
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+ setup_irq(JZ4740_IRQ_TCU0, &timer_irqaction);
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+
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+ ctrl = JZ_TIMER_CTRL_PRESCALE_16 | JZ_TIMER_CTRL_SRC_EXT;
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+
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+ jz4740_timer_set_ctrl(TIMER_CLOCKEVENT, ctrl);
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+ jz4740_timer_set_ctrl(TIMER_CLOCKSOURCE, ctrl);
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+
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+ jz4740_timer_set_period(TIMER_CLOCKEVENT, jz4740_jiffies_per_tick);
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+ jz4740_timer_irq_full_enable(TIMER_CLOCKEVENT);
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+
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+ jz4740_timer_set_period(TIMER_CLOCKSOURCE, 0xffff);
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+
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+ jz4740_timer_enable(TIMER_CLOCKEVENT);
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+ jz4740_timer_enable(TIMER_CLOCKSOURCE);
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+}
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