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sie-ceimtun/Examples/Beta1/logic/build/xst/work/hdllib.ref

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Pins corrected again
2010-10-31 21:13:54 +02:00
MO PWM NULL ../PWM.v vlg50/_p_w_m.bin 1288551148
MO beta NULL ../beta.v vlg5C/beta.bin 1288551148
MO PuenteH NULL ../PuenteH.v vlg69/_puente_h.bin 1288551148
MO enco NULL ../enco.v vlg6D/enco.bin 1288551148
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