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Uploaded the first Beta to test in the development group
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Examples/Beta1/logic/build/xst/work/hdllib.ref
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Examples/Beta1/logic/build/xst/work/hdllib.ref
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MO PWM NULL ../PWM.v vlg50/_p_w_m.bin 1288481438
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MO beta NULL ../beta.v vlg5C/beta.bin 1288481438
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MO PuenteH NULL ../PuenteH.v vlg69/_puente_h.bin 1288481438
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MO enco NULL ../enco.v vlg6D/enco.bin 1288481438
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Examples/Beta1/logic/build/xst/work/vlg50/_p_w_m.bin
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Examples/Beta1/logic/build/xst/work/vlg50/_p_w_m.bin
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Examples/Beta1/logic/build/xst/work/vlg5C/beta.bin
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Examples/Beta1/logic/build/xst/work/vlg5C/beta.bin
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Examples/Beta1/logic/build/xst/work/vlg69/_puente_h.bin
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Examples/Beta1/logic/build/xst/work/vlg69/_puente_h.bin
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Examples/Beta1/logic/build/xst/work/vlg6D/enco.bin
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Examples/Beta1/logic/build/xst/work/vlg6D/enco.bin
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