2011-09-07 10:20:08 +03:00
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--- Tue 2011-09-06 ------------------------------------------------------------
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2011-09-07 15:20:37 +03:00
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Running "loop": power-cycle, sleep 2 s, jtag-boot, sleep 70 seconds,
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which is enough to boot into FN and render "The Tunnel" for a moment,
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then power-cycle again (off-time is 5 s).
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Note that the test loop is "open-loop" and will cycle also past any
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problems. The first time a corrupt standby (or any other issue) is
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observed may therefore be well after the actual event.
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2011-09-07 10:20:08 +03:00
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1: started around 11:53 (M1 configuration is original, without locking)
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(around 500) visually checked boot process; standby was reached normally
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--- Wed 2011-09-07 ------------------------------------------------------------
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645: neocon stopped working (around 01:58)
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666: detected neocon failure at run 666: restarted neocon; urjtag failed
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this cycle; back to normal at 667
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684: checked LEDs again (first time since ~500) and found that standby
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may be failing. stopping test at 685 (around 02:50) for
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investigation.
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Downloaded the standby bitstream:
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wget https://raw.github.com/milkymist/scripts/master/scripts/reflash_m1.sh
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chmod 755 reflash_m1.sh
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./reflash_m1.sh --read-flash
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Found two corruptions in the standby bitstream:
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diff -u <(hexdump -C standby.fpg) <(hexdump -C /home/root/.qi/milkymist/read-flash/2011...)
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-00000080 00 00 4c 83 00 00 4c 87 00 00 cc 85 d8 47 cc 43 |..L...L......G.C|
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+00000080 00 00 4c 83 00 00 4c 87 00 00 c4 80 d8 47 cc 43 |..L...L......G.C|
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-00002840 00 08 cc 26 00 00 00 00 00 00 00 00 0c 44 00 98 |...&.........D..|
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+00002840 00 00 cc 26 00 00 00 00 00 00 00 00 0c 44 00 98 |...&.........D..|
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CRC-checked the partitions:
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git clone git://github.com/milkymist/milkymist
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cd milkymist/tools/
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gcc -Wall -I. -o flterm flterm.c
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wget http://milkymist.org/updates/current/for-rc3/boot.4e53273.bin
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./flterm --port /dev/ttyUSB0 --kernel boot.4e53273.bin
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2011-09-07 15:20:37 +03:00
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serialboot
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a
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2011-09-07 10:20:08 +03:00
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only standby.fpg failed the CRC check
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Reflashed the standby bitstream:
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wget http://milkymist.org/updates/2011-07-13/for-rc3/fjmem.bit
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(or http://milkymist.org/updates/fjmem.bit.bz2)
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wget http://milkymist.org/updates/current/standby.fpg
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jtag
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cable milkymist
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detect
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instruction CFG_OUT 000100 BYPASS
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instruction CFG_IN 000101 BYPASS
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pld load fjmem.bit
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initbus fjmem opcode=000010
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frequency 6000000
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detectflash 0
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endian big
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flashmem 0 standby.fpg noverify
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M1 enters standby normally again.
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2011-09-07 15:20:37 +03:00
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Running "loop2": power-cycle, sleep 2 s, jtag-boot, sleep 10 seconds,
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which is enough to begin (but not finish) booting RTEMS, then
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power-cycle again (off-time is 5 s).
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1: started around 05:01. Observed until about 200-300 (06:00-06:30)
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that standby was okay.
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~730 (08:48): observed that standby didn't load anymore (note: due to
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a bug in labsw, power is not turned on in about 5-10% of the cycles,
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so the real cycle count should be around 650-700.)
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Standby bitstream difference:
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-00000080 00 00 4c 83 00 00 4c 87 00 00 cc 85 d8 47 cc 43 |..L...L......G.C|
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+00000080 00 00 00 00 00 00 4c 87 00 00 cc 85 d8 47 cc 43 |......L......G.C|
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Reflashed standby and locked the NOR. Testing with loop2 again.
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1 (09:18): started
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2011-09-08 14:34:40 +03:00
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... continuing through the night ...
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--- Thu 2011-09-08 ------------------------------------------------------------
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3483 (03:18): standby is good so far
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4325 (07:40): manually ended test. Standby is still good, but starting
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with cycle 3704, booting RTEMS failed with
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I: Booting from flash...
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I: Loading 1889692 bytes from flash...
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E: CRC failed (expected aa12a56a, got 68ec25e6)
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A CRC check yielded:
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Images CRC:
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Checking : standby.fpg CRC passed (got c58e8905)
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Checking : soc-rescue.fpg CRC passed (got 30dcc535)
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Checking : bios-rescue.bin(CRC) CRC passed (got c78353fa)
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Checking : splash-rescue.raw CRC passed (got e8ff824f)
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Checking : flickernoise.fbi(rescue)(CRC) CRC passed (got aa12a56a)
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Checking : soc.fpg CRC passed (got 3a31e737)
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Checking : bios.bin(CRC) CRC passed (got 86e23684)
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Checking : splash.raw CRC passed (got 978f860c)
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Checking : flickernoise.fbi(CRC) CRC failed (expected aa12a56a, got 68ec25e6)
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Read back the FlickerNoise partition with
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readmem 0x920000 0x0400000 fn.bin
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Compare with the original:
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wget http://www.milkymist.org/updates/2011-07-13/flickernoise.fbi
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md5sum flickernoise.fbi
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5b7367e71bda306b080bde124615859b flickernoise.fbi
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diff -u <(hexdump -C flickernoise.fbi) <(hexdump -C fn.bin)
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...
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-0008a380 28 43 00 00 34 64 00 01 58 44 00 00 5c 60 00 1e |(C..4d..XD..\`..|
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+0008a380 28 43 00 00 00 00 00 01 58 44 00 00 5c 60 00 1e |(C......XD..\`..|
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...
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2011-09-09 01:07:18 +03:00
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Recovered the FN partition and unlocked the NOR:
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flashmem 0x920000 flickernoise.fbi noverify
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unlockflash 0 55
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New test series with script loop4. This differs from loop2 in that
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it uses "pld reconfigure" to return to standby, instead of
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power-cycling. If we still observe corruption with this test, then
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a software problem would be to blame.
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1 (09:11): started
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2011-09-09 02:06:58 +03:00
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2509 (19:33): standby looks good
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All CRC checks pass. Verified that NOR was unlocked:
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(load fjmem, etc.)
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peek 0 # show old value
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poke 0 0x40 0 0x0000 # Word Program
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peek 0 # read back status (0x80 if okay, 0x92 if locked)
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poke 0 0xff # Read Array (switch back to normal operation)
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2011-09-09 17:07:06 +03:00
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2011-09-10 22:33:18 +03:00
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Took labsw offline to analyze occasional failure to switch. Failure
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was difficult to reproduce. Also opened labsw to tighten a loose nut.
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Afterwards (Friday run), labsw showed much fewer switch failures.
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2011-09-09 17:07:06 +03:00
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--- Fri 2011-09-09 ------------------------------------------------------------
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New test with script "loop5". This time, we only power cycle but don't
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try to boot out of standby. The purpose of this test is to confirm that
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NOR corruption does not occur when powering down while in standby.
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1 (11:04): started
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2011-09-10 22:33:18 +03:00
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200 (11:28:): stopped to issue "unlockflash 0 105" to make sure all of
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the NOR is unlocked, just in case
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Also checked CRCs. All is well.
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1 (11:31): started
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2637 (16:53): stopped. standby looks good.
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All partitions pass the CRC check.
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Repeating loop2 to make sure the NOR corruption hasn't disappeared for
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an unrelated reason. System is connected to oscilloscope monitoring the
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M1 DC in voltage. This connection provides grounding of DC in.
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1 (16:56): started
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--- Sat 2011-09-10 ------------------------------------------------------------
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2428 (04:57): standby still okay
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2440 (05::01): disconnected oscilloscope
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2463 (05:08): stopped test
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All partitions pass the CRC check. Read back the standby partition and
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also found no corruption in bitwise comparison. Furthermore, the unused
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area showed the expected 0xffff pattern.
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1 (05:14): restarted test, without oscilloscope.
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2213 (16:11): standby still okay
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All partitions pass the CRC check. Unused area of standby shows 0xffff.
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Prepared new test (loop7): like loop2, but make a "false start" of
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turning on both channels and immediately turn them off again, wait 16
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seconds, and only then power up properly. This would roughly correspond
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to labsw failing to turn on, as observed in the test runs in which NOR
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corruption occurred.
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1 (16:27): started loop7 test
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2011-09-11 18:42:11 +03:00
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... continuing through the night ...
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--- Sun 2011-09-11 ------------------------------------------------------------
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2001 (11:58): standby okay
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All partitions pass the CRC check. Unused area of standby shows 0xffff.
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Confirmed writability of NOR at address 0x80000 and at address 0.
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Instructions used at address 0x80000:
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jtag> peek 0x80000
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URJ_BUS_READ(0x00080000) = 0xFFFF (65535)
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jtag> poke 0x80000 0x40 0x80000 0xffee
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jtag> peek 0x80000
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URJ_BUS_READ(0x00080000) = 0x0080 (128)
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jtag> poke 0 0xff
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jtag> peek 0x80000
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URJ_BUS_READ(0x00080000) = 0xFFEE (65518)
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2011-09-13 02:17:32 +03:00
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--- Mon 2011-09-12 ------------------------------------------------------------
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loop8 is similar to loop7. It increases the "false on" period to 10 ms,
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which is enough to make the M1 power LED flash. It reduces the cool off
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period after the false on.
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1 (08:11): started loop8 test
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2120 (19:50): standby okay. All partitions pass CRC check.
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Going back to the beginning. Test loop (1) runs all the way to rendering.
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Maybe it is necessary after all ...
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1 (19:52): started loop (1) test (serial console logged in file log9)
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20 (20:17): ok
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