qi-hardware/wernermisc
1
0
Fork 0
mirror of git://projects.qi-hardware.com/wernermisc.git synced 2024-11-15 11:36:15 +02:00
Code
5d32ade1e5
wernermisc/labsw/labsw.cmp

298 lines
4.4 KiB
Plaintext
Raw Normal View History

labsw/: power bypassing is now the way SiLabs recommend
2011-09-11 02:00:05 +03:00
Cmp-Mod V01 Created by CvPCB (2010-12-27 BZR 2685)-unstable date = Sat Sep 10 19:58:29 2011
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
BeginCmp
labsw/: power bypassing is now the way SiLabs recommend
2011-09-11 02:00:05 +03:00
TimeStamp = /4E55CABB;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
Reference = C1;
labsw/: power bypassing is now the way SiLabs recommend
2011-09-11 02:00:05 +03:00
ValeurCmp = 4.7uF;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
IdModule = 0603;
EndCmp
BeginCmp
labsw/: power bypassing is now the way SiLabs recommend
2011-09-11 02:00:05 +03:00
TimeStamp = /4E55CAB9;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
Reference = C2;
labsw/: power bypassing is now the way SiLabs recommend
2011-09-11 02:00:05 +03:00
ValeurCmp = 100nF;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E6BE90B;
Reference = C3;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
ValeurCmp = 4.7uF;
IdModule = 0603;
EndCmp
labsw/: power bypassing is now the way SiLabs recommend
2011-09-11 02:00:05 +03:00
BeginCmp
TimeStamp = /4E6BE909;
Reference = C4;
ValeurCmp = 100nF;
IdModule = 0603;
EndCmp
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
BeginCmp
TimeStamp = /4E534734;
Reference = CON1;
ValeurCmp = MINI_USB_B;
IdModule = miniUSB_B;
EndCmp
BeginCmp
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
TimeStamp = /4E55BEC4/4E595CFA;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
Reference = D1;
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
ValeurCmp = DS;
labsw/: changed flyback diodes to SOT-323 (BAS16WT or similar)
2011-08-28 00:24:02 +03:00
IdModule = SOT-323;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
EndCmp
BeginCmp
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
TimeStamp = /4E55BEC4/4E595CFC;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
Reference = D2;
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
ValeurCmp = DS;
labsw/: changed flyback diodes to SOT-323 (BAS16WT or similar)
2011-08-28 00:24:02 +03:00
IdModule = SOT-323;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E55BFD8;
Reference = K1;
ValeurCmp = CONN_3;
IdModule = HDR-3x1-200mil;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E55BFD7;
Reference = K2;
ValeurCmp = CONN_3;
IdModule = HDR-3x1-200mil;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E55BFDC;
Reference = K3;
ValeurCmp = SPDT-C;
IdModule = RELAY;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E55BFDB;
Reference = K4;
ValeurCmp = SPDT-C;
IdModule = RELAY;
EndCmp
BeginCmp
TimeStamp = /4E55CC1E;
Reference = P1;
ValeurCmp = CONN_4;
IdModule = HDR-4x1-100mil;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E55BFD6;
Reference = P2;
ValeurCmp = CONN_2;
IdModule = HDR-2x1-100mil;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E55C01D;
Reference = P3;
ValeurCmp = CONN_6X2;
IdModule = HDR-6x2-100mil;
EndCmp
BeginCmp
TimeStamp = /4E55BED6/4E55BFB7;
Reference = P4;
ValeurCmp = CONN_4X2;
IdModule = HDR-4x2-100mil;
EndCmp
BeginCmp
TimeStamp = /4E55BED6/4E55BFB6;
Reference = P5;
ValeurCmp = CONN_4X2;
IdModule = HDR-4x2-100mil;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E55FF19;
Reference = Q1;
ValeurCmp = NPN;
IdModule = SOT-323-CW;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E55FF2E;
Reference = Q2;
ValeurCmp = NPN;
IdModule = SOT-323-CW;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E55BFD4;
Reference = R1;
labsw/: power bypassing is now the way SiLabs recommend
2011-09-11 02:00:05 +03:00
ValeurCmp = 150;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E55BFD5;
Reference = R2;
labsw/: power bypassing is now the way SiLabs recommend
2011-09-11 02:00:05 +03:00
ValeurCmp = 150;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E55BED6/4E55BFB3;
Reference = R3;
labsw/: power bypassing is now the way SiLabs recommend
2011-09-11 02:00:05 +03:00
ValeurCmp = 150;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E55BED6/4E55BFB2;
Reference = R4;
labsw/: power bypassing is now the way SiLabs recommend
2011-09-11 02:00:05 +03:00
ValeurCmp = 150;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E55BED6/4E55BFB1;
Reference = R5;
labsw/: power bypassing is now the way SiLabs recommend
2011-09-11 02:00:05 +03:00
ValeurCmp = 150;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E55BED6/4E55BFB0;
Reference = R6;
labsw/: power bypassing is now the way SiLabs recommend
2011-09-11 02:00:05 +03:00
ValeurCmp = 150;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E55BED6/4E55BFAF;
Reference = R7;
ValeurCmp = 1k;
IdModule = 2512;
EndCmp
BeginCmp
TimeStamp = /4E55BED6/4E55BFAE;
Reference = R8;
ValeurCmp = 1k;
IdModule = 2512;
EndCmp
BeginCmp
TimeStamp = /4E55BED6/4E55BFAD;
Reference = R9;
ValeurCmp = 1k;
IdModule = 2512;
EndCmp
BeginCmp
TimeStamp = /4E55BED6/4E55BFAC;
Reference = R10;
ValeurCmp = 1k;
IdModule = 2512;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E571DE7;
Reference = R11;
ValeurCmp = 100;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E571DE9;
Reference = R12;
ValeurCmp = 100;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E571DEB;
Reference = R13;
ValeurCmp = 100;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E571F7B;
Reference = R14;
ValeurCmp = 1k;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E55BEC4/4E571F7D;
Reference = R15;
ValeurCmp = 1k;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E5344A0;
Reference = U1;
ValeurCmp = C8051F320;
IdModule = LQFP32;
EndCmp
BeginCmp
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
TimeStamp = /4E55BEC4/4E5A3025;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
Reference = U2;
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
ValeurCmp = OPTO-TRANS-2X4;
IdModule = DIP-8-300mil;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
EndCmp
BeginCmp
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
TimeStamp = /4E55BED6/4E5A35D5;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
Reference = U3;
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
ValeurCmp = OPTO-TRANS-2X4;
IdModule = DIP-8-300mil;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
EndCmp
BeginCmp
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
TimeStamp = /4E55BED6/4E5A35CF;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
Reference = U4;
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
ValeurCmp = OPTO-TRANS-2X4;
IdModule = DIP-8-300mil;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
EndCmp
BeginCmp
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
TimeStamp = /4E55BED6/4E5A347B;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
Reference = U5;
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
ValeurCmp = OPTO-TRANS-2X4;
IdModule = DIP-8-300mil;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
EndCmp
BeginCmp
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
TimeStamp = /4E55BED6/4E5A3480;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
Reference = U6;
labsw/: grouped opto-couplers for socketing; improved clearance of inputs
2011-08-28 16:46:02 +03:00
ValeurCmp = OPTO-TRANS-2X4;
IdModule = DIP-8-300mil;
labsw/: schematics, layout, and header.fpd update (in progress)
2011-08-26 07:34:12 +03:00
EndCmp
BeginCmp
TimeStamp = /4E55CA29;
Reference = VR1;
ValeurCmp = VR;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E55CA26;
Reference = VR2;
ValeurCmp = VR;
IdModule = 0603;
EndCmp
BeginCmp
TimeStamp = /4E55CA27;
Reference = VR3;
ValeurCmp = VR;
IdModule = 0603;
EndCmp
EndListe
Copy Permalink