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m1/perf/: scheduler cleanup; output comparison tool
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31558805ae
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64e2a3c6b7
@ -3,7 +3,9 @@ COMPILER_DIR=$(M1)/flickernoise/src
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M1SWINC_DIR=$(M1)/milkymist/software/include
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M1SWLIB_DIR=$(M1)/milkymist/software/libfpvm
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CFLAGS_COMMON=-Wall -g -pg # -DCOMP_DEBUG
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#CFLAGS_EXTRA=-DCOMP_DEBUG
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CFLAGS_EXTRA=
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CFLAGS_COMMON=-Wall -g -pg $(CFLAGS_EXTRA)
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CFLAGS=$(CFLAGS_COMMON) \
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-I$(COMPILER_DIR) \
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-Ifakes -I$(M1SWINC_DIR)
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@ -15,6 +17,8 @@ COMPILER_O = $(COMPILER_DIR)/compiler.o
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LIBFPVM_A = $(M1SWLIB_DIR)/libfpvm.a
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OBJS = main.o $(COMPILER_O)
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.PHONY: all clean path
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all: main
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main: $(OBJS) $(LIBFPVM_A)
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@ -33,3 +37,6 @@ clean:
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$(MAKE) -C $(M1SWLIB_DIR) clean
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$(MAKE) -C $(COMPILER_DIR) clean
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rm -f $(OBJS)
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path:
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@echo $(M1)
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37
m1/perf/eval.pl
Executable file
37
m1/perf/eval.pl
Executable file
@ -0,0 +1,37 @@
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#!/usr/bin/perl
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#while (<>) {
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# last if /per-vertex PFPU fragment/;
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#}
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$i = 0;
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while (<>) {
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next unless
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/^(\d+):\s+(\S+)\s+(R\d+)?(,(R\d+))?.*?(->\s+(R\d+))?\s*$/;
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# 1 2 3 4 5 6 7
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($c, $op, $a, $b, $d) = ($1, $2, $3, $5, $7);
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undef $e;
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$e = $1 if /E=(\d+)>/;
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die if $c != $i;
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$a = $reg{$a} if defined $reg{$a};
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$b = $reg{$b} if defined $reg{$b};
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if ($op eq "IF") {
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$expr = "(IF $reg{002} $a $b)";
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} elsif ($op eq "VECTOUT") {
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$res = "$a\n$b\n";
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} elsif (defined $b) {
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$expr = "($op $a $b)";
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} elsif (defined $a) {
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$expr = "($op $a)";
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} else {
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$expr = "($op)";
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}
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$val[$e] = $expr if defined $e;
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$reg{$d} = $val[$i] if defined $d;
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$i++;
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}
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print $res;
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110
m1/perf/sched.c
110
m1/perf/sched.c
@ -31,10 +31,12 @@
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#include <hw/pfpu.h>
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#define Dprintf(...)
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#define MAX_LATENCY 8 /* maximum latency; okay to make this bigger */
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#define Dprintf(...)
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#define FIELD(w) (((pfpu_instruction *) &(w))->i)
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struct list {
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@ -91,7 +93,7 @@ static void get_registers(struct fpvm_fragment *fragment,
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/*
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* Use naming conventions of include/linux/list.h
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* Use the naming conventions of include/linux/list.h
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*/
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static void list_init(struct list *list)
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@ -168,7 +170,12 @@ static struct vm_reg {
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int refs; /* usage count */
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} *regs;
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static struct list pfpu_regs[PFPU_REG_COUNT];
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static struct pfpu_reg {
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struct list more; /* list of unallocated PFPU registers */
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int vm_reg; /* corresponding FPVM register if allocated */
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int used; /* used somewhere in the program */
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} pfpu_regs[PFPU_REG_COUNT];
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static struct list unallocated; /* unallocated registers */
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static int nbindings; /* "public" bindings */
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@ -181,7 +188,7 @@ static int reg2idx(int reg)
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static int alloc_reg(struct insn *setter)
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{
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struct list *reg;
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struct pfpu_reg *reg;
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int vm_reg, pfpu_reg, vm_idx;
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vm_reg = setter->vm_insn->dest;
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@ -190,6 +197,7 @@ static int alloc_reg(struct insn *setter)
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reg = list_pop(&unallocated);
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if (!reg)
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abort();
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reg->vm_reg = vm_reg;
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pfpu_reg = reg-pfpu_regs;
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Dprintf(" alloc reg %d -> %d\n", vm_reg, pfpu_reg);
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vm_idx = reg2idx(vm_reg);
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@ -200,14 +208,10 @@ Dprintf(" alloc reg %d -> %d\n", vm_reg, pfpu_reg);
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}
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static void put_reg(struct insn *setter)
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static void put_reg(int vm_reg)
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{
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int vm_reg, vm_idx;
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int vm_idx;
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if (!setter)
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return;
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vm_reg = setter->vm_insn->dest;
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if (vm_reg >= 0)
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return;
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@ -220,7 +224,7 @@ Dprintf(" free reg %d\n", regs[vm_idx].pfpu_reg);
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* Prepend so that register numbers stay small and bugs reveal
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* themselves more rapidly.
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*/
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list_add(&unallocated, pfpu_regs+regs[vm_idx].pfpu_reg);
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list_add(&unallocated, &pfpu_regs[regs[vm_idx].pfpu_reg].more);
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/* clear it for style only */
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regs[vm_idx].setter = NULL;
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@ -228,12 +232,26 @@ Dprintf(" free reg %d\n", regs[vm_idx].pfpu_reg);
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}
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static void put_reg_by_setter(struct insn *setter)
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{
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if (setter)
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put_reg(setter->vm_insn->dest);
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}
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static int lookup_pfpu_reg(int vm_reg)
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{
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return vm_reg >= 0 ? vm_reg : regs[reg2idx(vm_reg)].pfpu_reg;
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}
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static void mark(int vm_reg)
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{
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if (vm_reg > 0)
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pfpu_regs[vm_reg].used = 1;
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}
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static void init_registers(struct fpvm_fragment *fragment,
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unsigned int *registers)
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{
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@ -247,14 +265,17 @@ static void init_registers(struct fpvm_fragment *fragment,
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regs = malloc(regs_size);
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memset(regs, 0, regs_size);
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list_init(&unallocated);
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for (i = fragment->nbindings; i != PFPU_REG_COUNT; i++)
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list_add_tail(&unallocated, pfpu_regs+i);
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memset(pfpu_regs, 0, sizeof(pfpu_regs));
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for (i = 0; i != fragment->ninstructions; i++) {
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mark(fragment->code[i].opa);
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mark(fragment->code[i].opb);
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mark(fragment->code[i].dest);
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}
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/*
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* @@@ the rules are more complex, see use of dont_touch in
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* init_scheduler_state
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*/
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list_init(&unallocated);
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for (i = PFPU_SPREG_COUNT; i != PFPU_REG_COUNT; i++)
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if (!pfpu_regs[i].used)
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list_add_tail(&unallocated, &pfpu_regs[i].more);
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}
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@ -264,9 +285,6 @@ static void init_registers(struct fpvm_fragment *fragment,
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static struct list unscheduled; /* unscheduled insns */
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static struct list waiting; /* insns waiting to be scheduled */
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static struct list ready[PFPU_PROGSIZE]; /* insns ready at nth cycle */
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static struct insn *exits[PFPU_PROGSIZE+MAX_LATENCY];
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/* insn writing at nth cycle */
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static struct insn dummy_insn; /* dummy, to signal occupancy */
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static struct vm_reg *add_data_ref(struct insn *insn, struct data_ref *ref,
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@ -335,29 +353,15 @@ catch = 1;
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list_add_tail(&unscheduled, &insn->more);
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else
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list_add_tail(&ready[0], &insn->more);
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}
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/*
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* We add a few dummy instructions at the end so that we don't need to
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* check array boundaries for the unlikely case of overrunning the
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* schedule.
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*/
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for (i = 0; i != PFPU_PROGSIZE; i++)
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exits[i] = NULL;
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for (; i != PFPU_PROGSIZE+MAX_LATENCY; i++)
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exits[i] = &dummy_insn;
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}
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static unsigned issue(struct insn *insn, int cycle)
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static void issue(struct insn *insn, int cycle, unsigned *code)
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{
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pfpu_instruction code;
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struct data_ref *ref;
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int end;
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int nada = 0;
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end = cycle+insn->latency;
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exits[end] = insn;
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Dprintf("cycle %d: insn %lu L %d (A %d B %d)\n",
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cycle, insn-insns, insn->latency, insn->vm_insn->opa, insn->vm_insn->opb);
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@ -365,12 +369,12 @@ Dprintf("cycle %d: insn %lu L %d (A %d B %d)\n",
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case 3:
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/* fall through */
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case 2:
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code.i.opb = lookup_pfpu_reg(insn->vm_insn->opb);
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put_reg(insn->opb.dep);
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FIELD(code[cycle]).opb = lookup_pfpu_reg(insn->vm_insn->opb);
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put_reg_by_setter(insn->opb.dep);
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/* fall through */
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case 1:
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code.i.opa = lookup_pfpu_reg(insn->vm_insn->opa);
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put_reg(insn->opa.dep);
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FIELD(code[cycle]).opa = lookup_pfpu_reg(insn->vm_insn->opa);
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put_reg_by_setter(insn->opa.dep);
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break;
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case 0:
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break;
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@ -378,23 +382,19 @@ Dprintf("cycle %d: insn %lu L %d (A %d B %d)\n",
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abort();
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}
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code.i.dest = alloc_reg(insn);
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code.i.opcode = fpvm_to_pfpu(insn->vm_insn->opcode);
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FIELD(code[end]).dest = alloc_reg(insn);
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FIELD(code[cycle]).opcode = fpvm_to_pfpu(insn->vm_insn->opcode);
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foreach (ref, &insn->dependants) {
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if (ref->insn->earliest <= end)
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ref->insn->earliest = end+1;
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if (!--ref->insn->unresolved) {
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Dprintf(" unlocked %lu -> %u\n", ref->insn-insns, ref->insn->earliest);
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nada = 0;
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list_del(&ref->insn->more);
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list_add_tail(ready+ref->insn->earliest,
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&ref->insn->more);
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}
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}
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if (nada && catch) *(volatile int *) 0 = 1;
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return code.w;
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}
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@ -423,15 +423,19 @@ Dprintf("@%d --- remaining %d, waiting %d + ready %d = ", i, remaining,
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count(&waiting), count(&ready[i]));
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list_concat(&waiting, &ready[i]);
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Dprintf("%d\n", count(&waiting));
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foreach (insn, &waiting)
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if (!exits[i+insn->latency]) {
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code[i] = issue(insn, i);
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foreach (insn, &waiting) {
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end = i+insn->latency;
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if (end >= PFPU_PROGSIZE)
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return -1;
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if (!FIELD(code[end]).dest) {
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issue(insn, i, code);
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list_del(&insn->more);
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remaining--;
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break;
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}
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if (exits[i])
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put_reg(exits[i]);
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}
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if (FIELD(code[i]).dest)
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put_reg(pfpu_regs[FIELD(code[i]).dest].vm_reg);
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}
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/*
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@ -442,7 +446,7 @@ Dprintf("%d\n", count(&waiting));
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if (end > PFPU_PROGSIZE)
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end = PFPU_PROGSIZE;
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while (i != end) {
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if (exits[i])
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if (FIELD(code[i]).dest)
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last = i+1; /* @@@ ? */
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i++;
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}
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