mirror of
git://projects.qi-hardware.com/wernermisc.git
synced 2024-12-18 10:47:32 +02:00
bacon/case/: corrections of bottom part; updates for machining
This commit is contained in:
parent
24fdda0713
commit
ddc5e0e935
@ -14,12 +14,14 @@ GP2RML = $(CAE_TOOLS)/gp2rml/gp2rml
|
||||
# new run (10 45, 135 85, 7.8)
|
||||
# #1: 13 45
|
||||
# #2: 75 48
|
||||
# Z1 = -44
|
||||
# PIECE_Z = 7.9
|
||||
|
||||
X0 = 75
|
||||
Y0 = 48
|
||||
Z1 = -50
|
||||
X0 = 5
|
||||
Y0 = 45
|
||||
Z1 = -44
|
||||
PIECE = -5 -5 30 55
|
||||
PIECE_Z = 7.9
|
||||
PIECE_Z = 5.5
|
||||
Z_STEP = 2
|
||||
CLEARANCE = 2
|
||||
SPEED_XY = 1
|
||||
|
@ -14,11 +14,11 @@
|
||||
#define QLL(pfx, r) \
|
||||
Q(pfx##lly, pfx##llx, pfx##ll, (0mm, r), (r, 0mm))
|
||||
#define QLR(pfx, r) \
|
||||
Q(pfx##lrx, pfx##lry, pfx##lr, (-r, 0mm), (0mm, r))
|
||||
Q(pfx##lrx, pfx##lry, pfx##lr, (-(r), 0mm), (0mm, r))
|
||||
#define QUL(pfx, r) \
|
||||
Q(pfx##ulx, pfx##uly, pfx##ul, (r, 0mm), (0mm, -r))
|
||||
Q(pfx##ulx, pfx##uly, pfx##ul, (r, 0mm), (0mm, -(r)))
|
||||
#define QUR(pfx, r) \
|
||||
Q(pfx##ury, pfx##urx, pfx##ur, (0mm, -r), (-r, 0mm))
|
||||
Q(pfx##ury, pfx##urx, pfx##ur, (0mm, -(r)), (-(r), 0mm))
|
||||
|
||||
/*
|
||||
* Rectangle with rounded corners.
|
||||
@ -205,19 +205,22 @@ frame bot_rrect {
|
||||
QUL(edge_, ro_edge);
|
||||
QUR(edge_, ro_edge);
|
||||
|
||||
set side = (width-cvr_w-cvr_play)/2-red
|
||||
set side = (width-cvr_w-2*cvr_play)/2-red
|
||||
cvr_ll: vec edge_ll(side, 0mm)
|
||||
cvr_lr: vec edge_lr(-side, 0mm)
|
||||
cvr_ul: vec cvr_ll(0mm, cvr_d+cvr_play+red)
|
||||
cvr_ur: vec cvr_lr(0mm, cvr_d+cvr_play+red)
|
||||
cvr_ul: vec cvr_ll(0mm, cvr_d+2*cvr_play+red)
|
||||
cvr_ur: vec cvr_lr(0mm, cvr_d+2*cvr_play+red)
|
||||
|
||||
line edge_ll cvr_ll
|
||||
line edge_ll cvr_ll /* outside */
|
||||
|
||||
line cvr_ll cvr_ul /* cover bay */
|
||||
line cvr_ul cvr_ur
|
||||
line cvr_ur cvr_lr
|
||||
QUL(cvr_, cvr_r+red+cvr_play) /* cover bay */
|
||||
QUR(cvr_, cvr_r+red+cvr_play)
|
||||
|
||||
line cvr_lr edge_lr
|
||||
line cvr_ll cvr_uly
|
||||
line cvr_ulx cvr_urx
|
||||
line cvr_ury cvr_lr
|
||||
|
||||
line cvr_lr edge_lr /* outside */
|
||||
line edge_ll edge_uly
|
||||
line edge_lr edge_ury
|
||||
line edge_ulx edge_urx
|
||||
@ -238,7 +241,7 @@ frame bot_posts {
|
||||
frame bot_base {
|
||||
loop if = 1, bot_base
|
||||
|
||||
set red = cvr_foot+cvr_play
|
||||
set red = cvr_foot
|
||||
frame bot_rrect @
|
||||
}
|
||||
|
||||
@ -297,8 +300,8 @@ table
|
||||
{ 20.2mm, 12.1mm, 4.1mm, 4.0mm, 5.0mm, 4.5mm }
|
||||
|
||||
table
|
||||
{ cvr_w, cvr_d, cvr_f, cvr_foot, cvr_play }
|
||||
{ 20.0mm, 15.0mm, 5.0mm, 0.8mm, 0.1 mm }
|
||||
{ cvr_w, cvr_d, cvr_f, cvr_foot, cvr_play, cvr_r }
|
||||
{ 20.0mm, 15.0mm, 5.0mm, 0.8mm, 0.1mm, 2.0mm }
|
||||
|
||||
set width = pcbw+2*(pcbgap+topridge+topborder)
|
||||
set length = pcbl+2*(pcbgap+topridge+topborder)
|
||||
|
Loading…
Reference in New Issue
Block a user