mirror of
git://projects.qi-hardware.com/wernermisc.git
synced 2024-11-15 15:43:43 +02:00
191 lines
2.8 KiB
Plaintext
191 lines
2.8 KiB
Plaintext
/* MACHINE-GENERATED ! */
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frame short {
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__0: vec @(Iox, 0mm)
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line @ . w
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__1: vec .(Lox, 0mm)
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__2: vec .(Iix, 0mm)
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line __1 . w
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__3: vec __0(0mm, -Ly)
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line __0 . w
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__4: vec __1(0mm, -Ly)
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line __3 . w
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line . __1 w
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__5: vec __2(Lix, 0mm)
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__6: vec __2(0mm, -Ly)
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line __2 . w
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__7: vec __5(0mm, -Ly)
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line __6 . w
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line . __5 w
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__8: vec __5(Iix, 0mm)
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line __5 . w
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__9: vec .(Lox, 0mm)
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__10: vec .(Iox, 0mm)
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line __9 . w
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__11: vec __8(0mm, -Ly)
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line __8 . w
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__12: vec __9(0mm, -Ly)
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line . __11 w
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line __9 . w
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__13: vec @(0mm, H)
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line . @ w
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__14: vec .(Iox, 0mm)
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line __13 . w
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__15: vec .(Lox, 0mm)
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__16: vec .(Iix, 0mm)
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line __15 . w
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__17: vec .(Lix, 0mm)
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__18: vec .(Iix, 0mm)
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line __17 . w
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__19: vec .(Lox, 0mm)
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__20: vec .(Iox, 0mm)
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line __19 . w
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line . __10 w
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__21: vec __14(0mm, Ly)
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line . __14 w
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__22: vec __15(0mm, Ly)
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line __21 . w
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line . __15 w
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__23: vec __16(0mm, Ly)
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line . __16 w
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__24: vec __17(0mm, Ly)
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line __23 . w
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line . __17 w
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__25: vec __18(0mm, Ly)
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line . __18 w
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__26: vec __19(0mm, Ly)
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line . __25 w
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line . __19 w
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}
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frame debug {
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table
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{ Wdbg, Hdbg }
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{ 14.5mm, 9.5mm }
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__0: vec @(Wdbg, Hdbg)
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rect @ . w
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}
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frame dc {
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table
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{ Wdc, Hdc }
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{ 9.4mm, 11.4mm }
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__0: vec @(-Wdc, Hdc)
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rect @ . w
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}
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frame ether {
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table
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{ Weth, Heth }
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{ 16.5mm, 14mm }
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__0: vec @(Weth, Heth)
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rect @ . w
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}
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frame rgb {
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set Rrgb = 6.3mm
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__0: vec @(0mm, Rrgb)
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circ @ . w
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}
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frame rear {
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table
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{ Irgbx, Irgby, Drgb }
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{ 25.5mm, 14.5mm, 15mm }
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table
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{ Iethx, Iethy }
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{ 67mm, 7mm }
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table
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{ Idcx, Idcy }
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{ 14.8mm, 6.6mm }
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table
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{ Idbgx, Idbgy }
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{ 88.1mm, 14.5mm }
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loop if = 1, rear
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__0: vec @(Irgbx, Irgby)
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frame rgb .
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__1: vec .(Drgb, 0mm)
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frame rgb .
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__2: vec .(Drgb, 0mm)
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frame rgb .
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__3: vec @(Iethx, Iethy)
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frame ether .
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__4: vec @(Ws, 0mm)
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__5: vec .(-Idcx, Idcy)
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frame dc .
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__6: vec @(Idbgx, Idbgy)
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frame debug .
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frame short @
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}
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frame usb {
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table
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{ Wusb, Husb }
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{ 8.5mm, 15.5mm }
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__0: vec @(-Wusb, Husb)
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rect . @ w
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}
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frame but {
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set Rbut = 4mm+0.1mm
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__0: vec @(0mm, Rbut)
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circ @ . w
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}
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frame front {
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table
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{ Ibutx, Ibuty, Dbut }
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{ 54.5mm, 10.5mm, 14mm }
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table
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{ Iusbx, Iusby, Dusb }
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{ 18.5mm, 6.5mm+1.4mm, 12.5mm }
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loop if = 1, front
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__0: vec @(Ibutx, Ibuty)
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frame but .
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__1: vec .(Dbut, 0mm)
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frame but .
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__2: vec .(Dbut, 0mm)
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frame but .
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__3: vec @(Ws, 0mm)
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__4: vec .(-Iusbx, Iusby)
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frame usb .
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__5: vec .(-Dusb, 0mm)
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frame usb .
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frame short @
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}
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package "M1-$part"
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unit mm
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table
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{ Iox, Lox, Ly, Iix, Lix }
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{ 10mm, 12mm, 3mm, 33mm, 21mm }
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set w = 0.1mm
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table
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{ H, Ws }
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{ 36.5mm, 2*(Iox+Lox+Iix)+Lix }
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table
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{ part, front, rear }
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{ "front", 1, 0 }
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{ "rear", 0, 1 }
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frame front @
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frame rear @
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