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qi-s3c6410-add-resume-path-processing.patch
First go at resume processing for 6410, can't test it until Ben Dooks confirms operation of Linux side on SMDK Signed-off-by: Andy Green <andy@openmoko.com>
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@ -423,9 +423,19 @@ start_code:
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ldr r1, =0x1FFF
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str r1, [r0, #UDIVSLOT_OFFSET]
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/* resuming? */
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ldr r0, =(ELFIN_CLOCK_POWER_BASE+RST_STAT_OFFSET)
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ldr r1, [r0]
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bic r1, r1, #0xfffffff7
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cmp r1, #0x8
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beq wakeup_reset
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/* no, cold boot */
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ldr r0, =ELFIN_UART_BASE + ELFIN_UART3_OFFSET
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ldr r1, =0x55
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str r1, [r0, #UTXH_OFFSET] @'U'
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/* >> CFG_VIDEO_LOGO_MAX_SIZE */
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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@ -446,5 +456,32 @@ clbss_l:
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b _steppingstone_done
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/* resume */
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wakeup_reset:
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ldr r0, =ELFIN_UART_BASE + ELFIN_UART3_OFFSET
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ldr r1, =0x4b4b4b4b
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str r1, [r0, #UTXH_OFFSET]
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/*Clear wakeup status register*/
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ldr r0, =(ELFIN_CLOCK_POWER_BASE+WAKEUP_STAT_OFFSET)
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ldr r1, [r0]
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str r1, [r0]
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#if 0
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/*LED test*/
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ldr r0, =ELFIN_GPIO_BASE
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ldr r1, =0x3000
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str r1, [r0, #GPNDAT_OFFSET]
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#endif
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/*Load return address and jump to kernel*/
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ldr r0, =(ELFIN_CLOCK_POWER_BASE+INF_REG0_OFFSET)
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ldr r1, [r0] /* r1 = physical address of s3c6400_cpu_resume function*/
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mov pc, r1 /*Jump to kernel (sleep-s3c6400.S)*/
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nop
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nop
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4:
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b 4b
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