more fpga ddr lines has been connected

kicad/xue-rnc/xue-rnc.sch

@@ -1,11 +1,48 @@
-EESchema Schematic File Version 2  date Sun 08 Aug 2010 05:52:09 PM COT
-LIBS:power,../library/rj45-48025,../library/xue-nv,../library/xc6slx75fgg484,../library/xc6slx45fgg484,../library/micron_mobile_ddr,../library/micron_ddr_512Mb,../library/k8001,device,transistors,conn,linear,regul,74xx,cmos4000,adc-dac,memory,xilinx,special,microcontrollers,dsp,microchip,analog_switches,motorola,texas,intel,audio,interface,digital-audio,philips,display,cypress,siliconi,opto,atmel,contrib,valves,./xue-rnc.cache
+EESchema Schematic File Version 2  date Sun 08 Aug 2010 10:51:44 PM COT
+LIBS:power
+LIBS:rj45-48025
+LIBS:xue-nv
+LIBS:xc6slx75fgg484
+LIBS:xc6slx45fgg484
+LIBS:micron_mobile_ddr
+LIBS:micron_ddr_512Mb
+LIBS:k8001
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:special
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:xue-rnc-cache
 EELAYER 24  0
 EELAYER END
 $Descr A3 16535 11700
 Sheet 1 6
 Title ""
-Date "4 aug 2010"
+Date "9 aug 2010"
 Rev ""
 Comp ""
 Comment1 ""
@@ -13,30 +50,72 @@ Comment2 ""
 Comment3 ""
 Comment4 ""
 $EndDescr
+Wire Bus Line
+	4700 3150 5950 3150
+Wire Wire Line
+	4700 2800 5950 2800
+Wire Wire Line
+	4700 3750 5950 3750
+Wire Wire Line
+	4700 3900 5950 3900
+Wire Wire Line
+	4700 4250 5950 4250
+Wire Wire Line
+	4700 5950 5950 5950
+Wire Wire Line
+	4700 6550 5950 6550
+Wire Bus Line
+	4700 5250 5950 5250
+Wire Wire Line
+	4700 6300 5950 6300
+Wire Wire Line
+	4700 5700 5950 5700
+Wire Wire Line
+	4700 5400 5950 5400
+Wire Bus Line
+	4700 3050 5950 3050
+Wire Wire Line
+	5950 4100 4700 4100
+Wire Wire Line
+	4700 6150 5950 6150
+Wire Wire Line
+	9750 6350 9300 6350
+Wire Bus Line
+	5950 5100 5950 5050
+Wire Bus Line
+	5950 5050 4700 5050
+Wire Wire Line
+	4700 6050 5950 6050
+Wire Wire Line
+	4700 4000 5950 4000
+Wire Bus Line
+	4700 5150 5950 5150
+Wire Wire Line
+	4700 5800 5950 5800
+Wire Wire Line
+	4700 5500 5950 5500
+Wire Wire Line
+	4700 6400 5950 6400
+Wire Wire Line
+	4700 4900 5950 4900
+Wire Wire Line
+	4700 4350 5950 4350
+Wire Wire Line
+	4700 4500 5950 4500
+Wire Wire Line
+	4700 3650 5950 3650
+Wire Wire Line
+	4700 3450 5950 3450
+Wire Wire Line
+	4700 3350 5950 3350
+Wire Bus Line
+	4700 2950 5950 2950
 $Sheet
 S 10650 4900 1150 1100
 U 4C5F1EDC
 F0 "USB" 60
 F1 "USB.sch" 60
 $EndSheet
-Wire Bus Line
-	4700 5150 5950 5150
-Wire Wire Line
-	4700 4000 5950 4000
-Wire Wire Line
-	4700 6050 5950 6050
-Wire Bus Line
-	4700 5050 5950 5050
-Wire Bus Line
-	5950 5050 5950 5100
-Wire Wire Line
-	9750 6350 9300 6350
-Wire Wire Line
-	4700 6150 5950 6150
-Wire Wire Line
-	5950 4100 4700 4100
-Wire Bus Line
-	4700 3050 5950 3050
 $Sheet
 S 9750 6250 1450 2200
 U 4C4320F3
@@ -71,6 +150,25 @@ F6 "ETH_INT" I R 9300 6350 60
 F7 "M0_A[0..12]" O L 5950 5150 60 
 F8 "M1_A[0..12]" O L 5950 3050 60 
 F9 "M0_DQ[0..15]" B L 5950 5050 60 
+F10 "M0_UDQS" O L 5950 5400 60 
+F11 "M0_LDM" O L 5950 5800 60 
+F12 "M0_LDQS" O L 5950 5500 60 
+F13 "M0_UDM" O L 5950 5700 60 
+F14 "M0_RAS#" O L 5950 6400 60 
+F15 "M0_WE#" O L 5950 6550 60 
+F16 "M0_CKE" O L 5950 5950 60 
+F17 "M0_CAS#" O L 5950 6300 60 
+F18 "M1_CAS#" O L 5950 4250 60 
+F19 "M1_CKE" O L 5950 3900 60 
+F20 "M0_CS#" O L 5950 4900 60 
+F21 "M1_CS#" O L 5950 2800 60 
+F22 "M1_WE#" O L 5950 4500 60 
+F23 "M1_RAS#" O L 5950 4350 60 
+F24 "M1_UDM" O L 5950 3650 60 
+F25 "M1_LDQS" O L 5950 3450 60 
+F26 "M1_LDM" O L 5950 3750 60 
+F27 "M1_UDQS" O L 5950 3350 60 
+F28 "M1_DQ[0..15]" B L 5950 2950 60 
 $EndSheet
 $Sheet
 S 10650 2700 1150 1850