qi-hardware/xue
1
0
Fork 0
mirror of git://projects.qi-hardware.com/xue.git synced 2024-07-06 05:11:05 +03:00
Code

reordered schematics pages

Browse Source
This commit is contained in:
Wolfgang Spraul 2010-12-18 10:26:43 +00:00
parent 8a5aeeaddf
commit 67098a21f6
1 changed files with 100 additions and 100 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

200
kicad/xue-rnc/xue-rnc.sch
View File

@ -271,47 +271,28 @@ Wire Wire Line
Wire Wire Line
3650 1350 4000 1350
$Sheet
S 10900 5250 1320 700
U 4CB0D95D
F0 "expansion" 60
F1 "expansion.sch" 60
F2 "FPGA_BANK0_IO_[0..64]" B L 10900 5600 60
S 4000 950 1200 750
U 4C69ED5F
F0 "psu" 60
F1 "psu.sch" 60
F2 "AVR_SCK" B L 4000 1550 60
F3 "AVR_MISO" B L 4000 1350 60
F4 "AVR_MOSI" B L 4000 1450 60
F5 "AVR_RST" B L 4000 1250 60
$EndSheet
$Sheet
S 3650 2850 1550 2050
U 4C9E2AF4
F0 "camera" 60
F1 "camera.sch" 60
F2 "+2.8_VDDIO" B L 3650 4300 60
F3 "+1.8_VDD" B L 3650 4450 60
F4 "+2.8_VAA" B L 3650 4750 60
F5 "+2.8_VAAPIX" B L 3650 4600 60
F6 "+2.8_VDDPLL" B L 3650 4150 60
F7 "IS_TRIGGER" I R 5200 2950 60
F8 "IS_FLASH" O R 5200 3050 60
F9 "IS_SDA" B R 5200 3150 60
F10 "IS_SCL" B R 5200 3250 60
F11 "IS_I2C_ADDR" I R 5200 3350 60
F12 "IS_EXTCLK" I R 5200 3450 60
F13 "IS_RESET_N" I R 5200 3550 60
F14 "IS_OE_N" I R 5200 3650 60
F15 "IS_STANDBY" I R 5200 3750 60
F16 "IS_TEST" I R 5200 3850 60
F17 "IS_PIXEL" O R 5200 3950 60
F18 "IS_LINE" O R 5200 4050 60
F19 "IS_FRAME" O R 5200 4150 60
F20 "IS_DOUT[0..11]" O R 5200 4550 60
$EndSheet
$Sheet
S 2300 3850 1100 1000
U 4C9E2B0F
F0 "camera_psu" 60
F1 "camera_psu.sch" 60
F2 "+2.8_VDDPLL" B R 3400 4150 60
F3 "+2.8_VDDIO" B R 3400 4300 60
F4 "+1.8_VDD" B R 3400 4450 60
F5 "+2.8_VAAPIX" B R 3400 4600 60
F6 "+2.8_VAA" B R 3400 4750 60
S 4000 1900 1200 700
U 4C716A4D
F0 "dbg_prg" 60
F1 "dbg_prg.sch" 60
F2 "FPGA_TDO" B R 5200 2300 60
F3 "FPGA_TDI" B R 5200 2200 60
F4 "FPGA_TMS" B R 5200 2400 60
F5 "FPGA_TCK" B R 5200 2100 60
F6 "AVR_SCK" B L 4000 2100 60
F7 "AVR_RST" B L 4000 2400 60
F8 "AVR_MOSI" B L 4000 2200 60
F9 "AVR_MISO" B L 4000 2300 60
$EndSheet
$Sheet
S 6200 700 3350 5450
@ -411,30 +392,6 @@ F38 "M0_CLK" O L 6200 9900 60
F39 "M0_CLK#" O L 6200 10000 60
$EndSheet
$Sheet
S 4000 1900 1200 700
U 4C716A4D
F0 "dbg_prg" 60
F1 "dbg_prg.sch" 60
F2 "FPGA_TDO" B R 5200 2300 60
F3 "FPGA_TDI" B R 5200 2200 60
F4 "FPGA_TMS" B R 5200 2400 60
F5 "FPGA_TCK" B R 5200 2100 60
F6 "AVR_SCK" B L 4000 2100 60
F7 "AVR_RST" B L 4000 2400 60
F8 "AVR_MOSI" B L 4000 2200 60
F9 "AVR_MISO" B L 4000 2300 60
$EndSheet
$Sheet
S 4000 950 1200 750
U 4C69ED5F
F0 "psu" 60
F1 "psu.sch" 60
F2 "AVR_SCK" B L 4000 1550 60
F3 "AVR_MISO" B L 4000 1350 60
F4 "AVR_MOSI" B L 4000 1450 60
F5 "AVR_RST" B L 4000 1250 60
$EndSheet
$Sheet
S 10900 2900 1050 1950
U 4C4227FE
F0 "flash" 60
@ -454,43 +411,6 @@ F13 "SPI_FLASH_CS#" I L 10900 4500 60
F14 "SPI_DQ[0..3]" B L 10900 4700 60
$EndSheet
$Sheet
S 10850 9150 1100 1150
U 4C5F1EDC
F0 "usb" 60
F1 "usb.sch" 60
F2 "USBA_SPD" B L 10850 9200 60
F3 "USBA_OE_N" B L 10850 9300 60
F4 "USBA_RCV" B L 10850 9400 60
F5 "USBA_VP" B L 10850 9500 60
F6 "USBA_VM" B L 10850 9600 60
F7 "USBD_SPD" B L 10850 9800 60
F8 "USBD_OE_N" B L 10850 9900 60
F9 "USBD_RCV" B L 10850 10000 60
F10 "USBD_VP" B L 10850 10100 60
F11 "USBD_VM" B L 10850 10200 60
$EndSheet
$Sheet
S 10850 850 1300 1800
U 4C4320F3
F0 "ether" 60
F1 "ether.sch" 60
F2 "ETH_RXC" O L 10850 1100 60
F3 "ETH_RST_N" I L 10850 1200 60
F4 "ETH_CRS" O L 10850 1300 60
F5 "ETH_COL" O L 10850 1400 60
F6 "ETH_MDIO" B L 10850 1500 60
F7 "ETH_MDC" I L 10850 1600 60
F8 "ETH_RXD[0..3]" O L 10850 1800 60
F9 "ETH_RXDV" O L 10850 1900 60
F10 "ETH_RXER" O L 10850 2000 60
F11 "ETH_TXC" B L 10850 2100 60
F12 "ETH_TXD[0..3]" I L 10850 2200 60
F13 "ETH_TXEN" I L 10850 2300 60
F14 "ETH_TXER" I L 10850 2400 60
F15 "ETH_CLK" I L 10850 2500 60
F16 "ETH_INT" O L 10850 950 60
$EndSheet
$Sheet
S 3850 6550 1100 4000
U 4C421DD3
F0 "sdram" 60
@ -524,4 +444,84 @@ F27 "M1_CS#" I R 4950 6650 60
F28 "M1_A[0..12]" I R 4950 6900 60
F29 "M1_DQ[0..15]" B R 4950 6800 60
$EndSheet
$Sheet
S 10850 850 1300 1800
U 4C4320F3
F0 "ether" 60
F1 "ether.sch" 60
F2 "ETH_RXC" O L 10850 1100 60
F3 "ETH_RST_N" I L 10850 1200 60
F4 "ETH_CRS" O L 10850 1300 60
F5 "ETH_COL" O L 10850 1400 60
F6 "ETH_MDIO" B L 10850 1500 60
F7 "ETH_MDC" I L 10850 1600 60
F8 "ETH_RXD[0..3]" O L 10850 1800 60
F9 "ETH_RXDV" O L 10850 1900 60
F10 "ETH_RXER" O L 10850 2000 60
F11 "ETH_TXC" B L 10850 2100 60
F12 "ETH_TXD[0..3]" I L 10850 2200 60
F13 "ETH_TXEN" I L 10850 2300 60
F14 "ETH_TXER" I L 10850 2400 60
F15 "ETH_CLK" I L 10850 2500 60
F16 "ETH_INT" O L 10850 950 60
$EndSheet
$Sheet
S 10850 9150 1100 1150
U 4C5F1EDC
F0 "usb" 60
F1 "usb.sch" 60
F2 "USBA_SPD" B L 10850 9200 60
F3 "USBA_OE_N" B L 10850 9300 60
F4 "USBA_RCV" B L 10850 9400 60
F5 "USBA_VP" B L 10850 9500 60
F6 "USBA_VM" B L 10850 9600 60
F7 "USBD_SPD" B L 10850 9800 60
F8 "USBD_OE_N" B L 10850 9900 60
F9 "USBD_RCV" B L 10850 10000 60
F10 "USBD_VP" B L 10850 10100 60
F11 "USBD_VM" B L 10850 10200 60
$EndSheet
$Sheet
S 10900 5250 1320 700
U 4CB0D95D
F0 "expansion" 60
F1 "expansion.sch" 60
F2 "FPGA_BANK0_IO_[0..64]" B L 10900 5600 60
$EndSheet
$Sheet
S 2300 3850 1100 1000
U 4C9E2B0F
F0 "camera_psu" 60
F1 "camera_psu.sch" 60
F2 "+2.8_VDDPLL" B R 3400 4150 60
F3 "+2.8_VDDIO" B R 3400 4300 60
F4 "+1.8_VDD" B R 3400 4450 60
F5 "+2.8_VAAPIX" B R 3400 4600 60
F6 "+2.8_VAA" B R 3400 4750 60
$EndSheet
$Sheet
S 3650 2850 1550 2050
U 4C9E2AF4
F0 "camera" 60
F1 "camera.sch" 60
F2 "+2.8_VDDIO" B L 3650 4300 60
F3 "+1.8_VDD" B L 3650 4450 60
F4 "+2.8_VAA" B L 3650 4750 60
F5 "+2.8_VAAPIX" B L 3650 4600 60
F6 "+2.8_VDDPLL" B L 3650 4150 60
F7 "IS_TRIGGER" I R 5200 2950 60
F8 "IS_FLASH" O R 5200 3050 60
F9 "IS_SDA" B R 5200 3150 60
F10 "IS_SCL" B R 5200 3250 60
F11 "IS_I2C_ADDR" I R 5200 3350 60
F12 "IS_EXTCLK" I R 5200 3450 60
F13 "IS_RESET_N" I R 5200 3550 60
F14 "IS_OE_N" I R 5200 3650 60
F15 "IS_STANDBY" I R 5200 3750 60
F16 "IS_TEST" I R 5200 3850 60
F17 "IS_PIXEL" O R 5200 3950 60
F18 "IS_LINE" O R 5200 4050 60
F19 "IS_FRAME" O R 5200 4150 60
F20 "IS_DOUT[0..11]" O R 5200 4550 60
$EndSheet
$EndSCHEMATC