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mirror of git://projects.qi-hardware.com/xue.git synced 2024-12-26 07:14:36 +02:00
This commit is contained in:
Andres Calderon 2010-08-12 21:12:14 -05:00
parent ada00cd738
commit e1ce2a9e8f
10 changed files with 1346 additions and 1282 deletions

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 12 Aug 2010 05:12:17 PM COT EESchema Schematic File Version 2 date Thu 12 Aug 2010 09:08:15 PM COT
LIBS:power LIBS:power
LIBS:v0402mhs03 LIBS:v0402mhs03
LIBS:usb-48204-0001 LIBS:usb-48204-0001
@ -47,7 +47,7 @@ EELAYER END
$Descr A4 11700 8267 $Descr A4 11700 8267
Sheet 6 6 Sheet 6 6
Title "" Title ""
Date "12 aug 2010" Date "13 aug 2010"
Rev "" Rev ""
Comp "" Comp ""
Comment1 "" Comment1 ""

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EESchema Schematic File Version 2 date Thu 12 Aug 2010 05:12:17 PM COT EESchema Schematic File Version 2 date Thu 12 Aug 2010 09:08:15 PM COT
LIBS:power LIBS:power
LIBS:v0402mhs03 LIBS:v0402mhs03
LIBS:usb-48204-0001 LIBS:usb-48204-0001
@ -47,7 +47,7 @@ EELAYER END
$Descr A2 23400 16535 $Descr A2 23400 16535
Sheet 3 6 Sheet 3 6
Title "" Title ""
Date "12 aug 2010" Date "13 aug 2010"
Rev "" Rev ""
Comp "" Comp ""
Comment1 "" Comment1 ""
@ -56,7 +56,7 @@ Comment3 ""
Comment4 "" Comment4 ""
$EndDescr $EndDescr
Text HLabel 18600 10150 2 60 BiDi ~ 0 Text HLabel 18600 10150 2 60 BiDi ~ 0
ND_D[0..7] NF_D[0..7]
Wire Bus Line Wire Bus Line
18600 10150 18300 10150 18600 10150 18300 10150
Wire Wire Line Wire Wire Line

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 12 Aug 2010 05:12:17 PM COT EESchema Schematic File Version 2 date Thu 12 Aug 2010 09:08:15 PM COT
LIBS:power LIBS:power
LIBS:v0402mhs03 LIBS:v0402mhs03
LIBS:usb-48204-0001 LIBS:usb-48204-0001
@ -47,7 +47,7 @@ EELAYER END
$Descr A4 11700 8267 $Descr A4 11700 8267
Sheet 5 6 Sheet 5 6
Title "" Title ""
Date "12 aug 2010" Date "13 aug 2010"
Rev "" Rev ""
Comp "" Comp ""
Comment1 "" Comment1 ""

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 12 Aug 2010 05:12:17 PM COT EESchema Schematic File Version 2 date Thu 12 Aug 2010 09:08:15 PM COT
LIBS:power LIBS:power
LIBS:v0402mhs03 LIBS:v0402mhs03
LIBS:usb-48204-0001 LIBS:usb-48204-0001
@ -47,7 +47,7 @@ EELAYER END
$Descr A4 11700 8267 $Descr A4 11700 8267
Sheet 2 6 Sheet 2 6
Title "" Title ""
Date "12 aug 2010" Date "13 aug 2010"
Rev "" Rev ""
Comp "" Comp ""
Comment1 "" Comment1 ""

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 12 Aug 2010 05:12:17 PM COT EESchema Schematic File Version 2 date Thu 12 Aug 2010 09:08:15 PM COT
LIBS:power LIBS:power
LIBS:v0402mhs03 LIBS:v0402mhs03
LIBS:usb-48204-0001 LIBS:usb-48204-0001
@ -47,7 +47,7 @@ EELAYER END
$Descr A4 11700 8267 $Descr A4 11700 8267
Sheet 4 6 Sheet 4 6
Title "" Title ""
Date "12 aug 2010" Date "13 aug 2010"
Rev "" Rev ""
Comp "" Comp ""
Comment1 "" Comment1 ""

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@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Thu 12 Aug 2010 05:12:17 PM COT EESchema-LIBRARY Version 2.3 Date: Thu 12 Aug 2010 09:08:15 PM COT
# #
# +1.2V # +1.2V
# #

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update=Thu 12 Aug 2010 12:07:08 PM COT update=Thu 12 Aug 2010 09:10:48 PM COT
version=1 version=1
last_client=pcbnew last_client=pcbnew
[common] [common]

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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Thu 12 Aug 2010 05:12:17 PM COT EESchema Schematic File Version 2 date Thu 12 Aug 2010 09:08:15 PM COT
LIBS:power LIBS:power
LIBS:v0402mhs03 LIBS:v0402mhs03
LIBS:usb-48204-0001 LIBS:usb-48204-0001
@ -47,7 +47,7 @@ EELAYER END
$Descr A3 16535 11700 $Descr A3 16535 11700
Sheet 1 6 Sheet 1 6
Title "" Title ""
Date "12 aug 2010" Date "13 aug 2010"
Rev "" Rev ""
Comp "" Comp ""
Comment1 "" Comment1 ""
@ -244,7 +244,7 @@ F49 "SD_CMD" B R 9300 3000 60
F50 "SD_DAT[0..3]" B R 9300 3100 60 F50 "SD_DAT[0..3]" B R 9300 3100 60
F51 "ETH_CRS" I R 9300 6700 60 F51 "ETH_CRS" I R 9300 6700 60
F52 "ETH_COL" I R 9300 6800 60 F52 "ETH_COL" I R 9300 6800 60
F53 "ND_D[0..7]" B R 9300 4050 60 F53 "NF_D[0..7]" B R 9300 4050 60
$EndSheet $EndSheet
$Sheet $Sheet
S 10600 6250 1300 1800 S 10600 6250 1300 1800