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fix
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parent
ada00cd738
commit
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Thu 12 Aug 2010 05:12:17 PM COT
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EESchema Schematic File Version 2 date Thu 12 Aug 2010 09:08:15 PM COT
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LIBS:power
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LIBS:power
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LIBS:v0402mhs03
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LIBS:v0402mhs03
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LIBS:usb-48204-0001
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LIBS:usb-48204-0001
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@ -47,7 +47,7 @@ EELAYER END
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$Descr A4 11700 8267
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$Descr A4 11700 8267
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Sheet 6 6
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Sheet 6 6
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Title ""
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Title ""
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Date "12 aug 2010"
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Date "13 aug 2010"
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Rev ""
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Rev ""
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Comp ""
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Comp ""
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Comment1 ""
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Comment1 ""
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Thu 12 Aug 2010 05:12:17 PM COT
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EESchema Schematic File Version 2 date Thu 12 Aug 2010 09:08:15 PM COT
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LIBS:power
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LIBS:power
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LIBS:v0402mhs03
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LIBS:v0402mhs03
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LIBS:usb-48204-0001
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LIBS:usb-48204-0001
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@ -47,7 +47,7 @@ EELAYER END
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$Descr A2 23400 16535
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$Descr A2 23400 16535
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Sheet 3 6
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Sheet 3 6
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Title ""
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Title ""
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Date "12 aug 2010"
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Date "13 aug 2010"
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Rev ""
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Rev ""
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Comp ""
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Comp ""
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Comment1 ""
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Comment1 ""
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@ -56,7 +56,7 @@ Comment3 ""
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Comment4 ""
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Comment4 ""
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$EndDescr
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$EndDescr
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Text HLabel 18600 10150 2 60 BiDi ~ 0
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Text HLabel 18600 10150 2 60 BiDi ~ 0
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ND_D[0..7]
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NF_D[0..7]
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Wire Bus Line
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Wire Bus Line
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18600 10150 18300 10150
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18600 10150 18300 10150
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Wire Wire Line
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Wire Wire Line
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Thu 12 Aug 2010 05:12:17 PM COT
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EESchema Schematic File Version 2 date Thu 12 Aug 2010 09:08:15 PM COT
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LIBS:power
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LIBS:power
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LIBS:v0402mhs03
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LIBS:v0402mhs03
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LIBS:usb-48204-0001
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LIBS:usb-48204-0001
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@ -47,7 +47,7 @@ EELAYER END
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$Descr A4 11700 8267
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$Descr A4 11700 8267
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Sheet 5 6
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Sheet 5 6
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Title ""
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Title ""
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Date "12 aug 2010"
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Date "13 aug 2010"
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Rev ""
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Rev ""
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Comp ""
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Comp ""
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Comment1 ""
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Comment1 ""
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Thu 12 Aug 2010 05:12:17 PM COT
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EESchema Schematic File Version 2 date Thu 12 Aug 2010 09:08:15 PM COT
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LIBS:power
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LIBS:power
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LIBS:v0402mhs03
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LIBS:v0402mhs03
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LIBS:usb-48204-0001
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LIBS:usb-48204-0001
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@ -47,7 +47,7 @@ EELAYER END
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$Descr A4 11700 8267
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$Descr A4 11700 8267
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Sheet 2 6
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Sheet 2 6
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Title ""
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Title ""
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Date "12 aug 2010"
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Date "13 aug 2010"
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Rev ""
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Rev ""
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Comp ""
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Comp ""
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Comment1 ""
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Comment1 ""
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Thu 12 Aug 2010 05:12:17 PM COT
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EESchema Schematic File Version 2 date Thu 12 Aug 2010 09:08:15 PM COT
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LIBS:power
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LIBS:power
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LIBS:v0402mhs03
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LIBS:v0402mhs03
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LIBS:usb-48204-0001
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LIBS:usb-48204-0001
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@ -47,7 +47,7 @@ EELAYER END
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$Descr A4 11700 8267
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$Descr A4 11700 8267
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Sheet 4 6
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Sheet 4 6
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Title ""
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Title ""
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Date "12 aug 2010"
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Date "13 aug 2010"
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Rev ""
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Rev ""
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Comp ""
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Comp ""
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Comment1 ""
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Comment1 ""
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@ -1,4 +1,4 @@
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EESchema-LIBRARY Version 2.3 Date: Thu 12 Aug 2010 05:12:17 PM COT
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EESchema-LIBRARY Version 2.3 Date: Thu 12 Aug 2010 09:08:15 PM COT
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#
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#
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# +1.2V
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# +1.2V
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#
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#
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,4 +1,4 @@
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update=Thu 12 Aug 2010 12:07:08 PM COT
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update=Thu 12 Aug 2010 09:10:48 PM COT
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version=1
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version=1
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last_client=pcbnew
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last_client=pcbnew
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[common]
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[common]
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Thu 12 Aug 2010 05:12:17 PM COT
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EESchema Schematic File Version 2 date Thu 12 Aug 2010 09:08:15 PM COT
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LIBS:power
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LIBS:power
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LIBS:v0402mhs03
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LIBS:v0402mhs03
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LIBS:usb-48204-0001
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LIBS:usb-48204-0001
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@ -47,7 +47,7 @@ EELAYER END
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$Descr A3 16535 11700
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$Descr A3 16535 11700
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Sheet 1 6
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Sheet 1 6
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Title ""
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Title ""
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Date "12 aug 2010"
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Date "13 aug 2010"
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Rev ""
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Rev ""
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Comp ""
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Comp ""
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Comment1 ""
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Comment1 ""
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@ -244,7 +244,7 @@ F49 "SD_CMD" B R 9300 3000 60
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F50 "SD_DAT[0..3]" B R 9300 3100 60
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F50 "SD_DAT[0..3]" B R 9300 3100 60
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F51 "ETH_CRS" I R 9300 6700 60
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F51 "ETH_CRS" I R 9300 6700 60
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F52 "ETH_COL" I R 9300 6800 60
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F52 "ETH_COL" I R 9300 6800 60
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F53 "ND_D[0..7]" B R 9300 4050 60
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F53 "NF_D[0..7]" B R 9300 4050 60
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$EndSheet
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$EndSheet
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$Sheet
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$Sheet
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S 10600 6250 1300 1800
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S 10600 6250 1300 1800
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