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git://projects.qi-hardware.com/xue.git
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improved placement
This commit is contained in:
Andres Calderon
parent
2161dfcbc2
commit
fae8765d04
@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Fri 13 Aug 2010 06:37:07 PM COT
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EESchema Schematic File Version 2 date Fri 13 Aug 2010 07:13:52 PM COT
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LIBS:power
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LIBS:power
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LIBS:v0402mhs03
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LIBS:v0402mhs03
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LIBS:usb-48204-0001
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LIBS:usb-48204-0001
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@ -48,7 +48,7 @@ EELAYER END
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$Descr A4 11700 8267
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$Descr A4 11700 8267
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Sheet 6 6
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Sheet 6 6
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Title ""
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Title ""
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Date "13 aug 2010"
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Date "14 aug 2010"
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Rev ""
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Rev ""
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Comp ""
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Comp ""
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Comment1 ""
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Comment1 ""
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Fri 13 Aug 2010 06:37:07 PM COT
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EESchema Schematic File Version 2 date Fri 13 Aug 2010 07:13:52 PM COT
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LIBS:power
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LIBS:power
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LIBS:v0402mhs03
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LIBS:v0402mhs03
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LIBS:usb-48204-0001
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LIBS:usb-48204-0001
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@ -48,7 +48,7 @@ EELAYER END
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$Descr A2 23400 16535
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$Descr A2 23400 16535
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Sheet 4 6
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Sheet 4 6
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Title ""
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Title ""
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Date "13 aug 2010"
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Date "14 aug 2010"
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Rev ""
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Rev ""
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Comp ""
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Comp ""
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Comment1 ""
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Comment1 ""
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@ -56,39 +56,8 @@ Comment2 ""
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Comment3 ""
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Comment3 ""
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Comment4 ""
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Comment4 ""
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$EndDescr
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$EndDescr
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$Comp
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Wire Wire Line
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L +3.3V #PWR28
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16400 12400 16400 12650
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U 1 1 4C65CF66
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P 1650 14300
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F 0 "#PWR28" H 1650 14260 30 0001 C CNN
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F 1 "+3.3V" H 1650 14410 30 0000 C CNN
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1 1650 14300
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1 0 0 -1
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$EndComp
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$Comp
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L +2.5V #PWR33
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U 1 1 4C65C84B
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P 4600 14300
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F 0 "#PWR33" H 4600 14250 20 0001 C CNN
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F 1 "+2.5V" H 4600 14400 30 0000 C CNN
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1 4600 14300
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1 0 0 -1
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$EndComp
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$Comp
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L +2.5V #PWR30
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U 1 1 4C65C837
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P 4600 12350
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F 0 "#PWR30" H 4600 12300 20 0001 C CNN
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F 1 "+2.5V" H 4600 12450 30 0000 C CNN
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1 4600 12350
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1 0 0 -1
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$EndComp
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Text GLabel 4600 13350 1 30 BiDi ~ 0
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VCCO2
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Text Label 2200 7800 2 60 ~ 0
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PROG_MISO3
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Text Label 2200 7700 2 60 ~ 0
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PROG_MISO2
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Wire Wire Line
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Wire Wire Line
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1650 7800 2250 7800
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1650 7800 2250 7800
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Wire Wire Line
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Wire Wire Line
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@ -464,8 +433,6 @@ Wire Wire Line
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Connection ~ 16250 6200
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Connection ~ 16250 6200
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Wire Wire Line
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Wire Wire Line
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16250 6200 16250 6250
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16250 6200 16250 6250
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Wire Wire Line
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16400 12650 16400 12500
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Wire Wire Line
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Wire Wire Line
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16000 600 16000 750
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16000 600 16000 750
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Connection ~ 16300 700
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Connection ~ 16300 700
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@ -1145,6 +1112,41 @@ Wire Wire Line
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1650 7600 2250 7600
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1650 7600 2250 7600
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Wire Wire Line
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Wire Wire Line
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1650 7500 2250 7500
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1650 7500 2250 7500
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Wire Wire Line
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15900 12400 15900 12500
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$Comp
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||||||
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L +3.3V #PWR28
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U 1 1 4C65CF66
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P 1650 14300
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F 0 "#PWR28" H 1650 14260 30 0001 C CNN
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F 1 "+3.3V" H 1650 14410 30 0000 C CNN
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1 1650 14300
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1 0 0 -1
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$EndComp
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$Comp
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||||||
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L +2.5V #PWR33
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U 1 1 4C65C84B
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P 4600 14300
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F 0 "#PWR33" H 4600 14250 20 0001 C CNN
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F 1 "+2.5V" H 4600 14400 30 0000 C CNN
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1 4600 14300
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1 0 0 -1
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$EndComp
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$Comp
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L +2.5V #PWR30
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U 1 1 4C65C837
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P 4600 12350
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F 0 "#PWR30" H 4600 12300 20 0001 C CNN
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F 1 "+2.5V" H 4600 12450 30 0000 C CNN
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1 4600 12350
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1 0 0 -1
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$EndComp
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Text GLabel 4600 13350 1 30 BiDi ~ 0
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VCCO2
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Text Label 2200 7800 2 60 ~ 0
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PROG_MISO3
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Text Label 2200 7700 2 60 ~ 0
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PROG_MISO2
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Entry Wire Line
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Entry Wire Line
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1550 7700 1650 7800
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1550 7700 1650 7800
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Entry Wire Line
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Entry Wire Line
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Fri 13 Aug 2010 06:37:07 PM COT
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EESchema Schematic File Version 2 date Fri 13 Aug 2010 07:13:52 PM COT
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LIBS:power
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LIBS:power
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LIBS:v0402mhs03
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LIBS:v0402mhs03
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LIBS:usb-48204-0001
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LIBS:usb-48204-0001
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@ -48,7 +48,7 @@ EELAYER END
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$Descr A4 11700 8267
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$Descr A4 11700 8267
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||||||
Sheet 2 6
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Sheet 2 6
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Title ""
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Title ""
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Date "13 aug 2010"
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Date "14 aug 2010"
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Rev ""
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Rev ""
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Comp ""
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Comp ""
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Comment1 ""
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Comment1 ""
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Fri 13 Aug 2010 06:37:07 PM COT
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EESchema Schematic File Version 2 date Fri 13 Aug 2010 07:13:52 PM COT
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LIBS:power
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LIBS:power
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LIBS:v0402mhs03
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LIBS:v0402mhs03
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LIBS:usb-48204-0001
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LIBS:usb-48204-0001
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@ -48,7 +48,7 @@ EELAYER END
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$Descr A4 11700 8267
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$Descr A4 11700 8267
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Sheet 2 6
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Sheet 2 6
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Title ""
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Title ""
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Date "13 aug 2010"
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Date "14 aug 2010"
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Rev ""
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Rev ""
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Comp ""
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Comp ""
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Comment1 ""
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Comment1 ""
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Fri 13 Aug 2010 06:37:07 PM COT
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EESchema Schematic File Version 2 date Fri 13 Aug 2010 07:13:52 PM COT
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LIBS:power
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LIBS:power
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LIBS:v0402mhs03
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LIBS:v0402mhs03
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LIBS:usb-48204-0001
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LIBS:usb-48204-0001
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@ -48,7 +48,7 @@ EELAYER END
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$Descr A4 11700 8267
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$Descr A4 11700 8267
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Sheet 4 6
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Sheet 4 6
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Title ""
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Title ""
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Date "13 aug 2010"
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Date "14 aug 2010"
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Rev ""
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Rev ""
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Comp ""
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Comp ""
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Comment1 ""
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Comment1 ""
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@ -1,4 +1,4 @@
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EESchema-LIBRARY Version 2.3 Date: Fri 13 Aug 2010 06:37:07 PM COT
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EESchema-LIBRARY Version 2.3 Date: Fri 13 Aug 2010 07:13:52 PM COT
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#
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#
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# +1.2V
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# +1.2V
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#
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#
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,4 +1,4 @@
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update=Fri 13 Aug 2010 06:39:58 PM COT
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update=Fri 13 Aug 2010 07:16:08 PM COT
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version=1
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version=1
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last_client=pcbnew
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last_client=pcbnew
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[common]
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[common]
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@ -91,9 +91,9 @@ LibName42=../library/pasives-connectors
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LibName43=/home/afc/devel/Qi/xue/kicad/library/x25x64mb
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LibName43=/home/afc/devel/Qi/xue/kicad/library/x25x64mb
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[pcbnew]
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[pcbnew]
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version=1
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version=1
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PadDrlX=320
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PadDrlX=0
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PadDimH=600
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PadDimH=157
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PadDimV=600
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PadDimV=157
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BoardThickness=630
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BoardThickness=630
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SgPcb45=1
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SgPcb45=1
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TxtPcbV=800
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TxtPcbV=800
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Fri 13 Aug 2010 06:37:07 PM COT
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EESchema Schematic File Version 2 date Fri 13 Aug 2010 07:13:52 PM COT
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LIBS:power
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LIBS:power
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LIBS:v0402mhs03
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LIBS:v0402mhs03
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LIBS:usb-48204-0001
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LIBS:usb-48204-0001
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@ -48,7 +48,7 @@ EELAYER END
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|||||||
$Descr A3 16535 11700
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$Descr A3 16535 11700
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||||||
Sheet 1 6
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Sheet 1 6
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Title ""
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Title ""
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Date "13 aug 2010"
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Date "14 aug 2010"
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Rev ""
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Rev ""
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Comp ""
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Comp ""
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Comment1 ""
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Comment1 ""
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Loading…
Reference in New Issue
Block a user