12 Commits

Author	SHA1	Message	Date
Andres Calderon	1ba7525654	ddr-vref improved placement	2010-08-21 07:17:22 -05:00
Andres Calderon	7c3c9a8380	some eth-phy to s6 nets has been routed	2010-08-20 20:06:53 -05:00
Andres Calderon	e0d4a591d6	some eth-phy to s6 nets has been routed	2010-08-20 19:10:05 -05:00
Andres Calderon	033f3616c0	some eth-phy to s6 nets has been routed	2010-08-20 18:10:16 -05:00
Andres Calderon	f12b0a7911	PSU ICs has been selected	2010-08-19 08:51:56 -05:00
Andres Calderon	e2867d726e	3.3v dc-dc added	2010-08-18 22:09:52 -05:00
Andres Calderon	7be9df3fef	fpga decoupling cap. placement improved	2010-08-17 19:36:33 -05:00
Andres Calderon	00a88f8396	ddr terminators placment	2010-08-17 19:04:05 -05:00
Andres Calderon	5c25d1c015	DDR0 termaintor placement	2010-08-16 23:30:34 -05:00
Andres Calderon	cf1645bb44	DDR0 termaintor placement	2010-08-16 22:48:30 -05:00
Andres Calderon	8cf60ceb3c	PSU controller added	2010-08-16 21:49:00 -05:00
Andres Calderon	a1ba8c9c6e	PSU sheet added	2010-08-16 21:09:50 -05:00