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DDR0 termaintor placement
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EESchema Schematic File Version 2 date Mon 16 Aug 2010 09:46:10 PM COT
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EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT
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LIBS:power
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LIBS:r_pack2
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LIBS:v0402mhs03
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EESchema Schematic File Version 2 date Mon 16 Aug 2010 09:46:10 PM COT
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EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT
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LIBS:power
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LIBS:r_pack2
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LIBS:v0402mhs03
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Mon 16 Aug 2010 09:46:10 PM COT
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EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT
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LIBS:power
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LIBS:r_pack2
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LIBS:v0402mhs03
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Mon 16 Aug 2010 09:46:10 PM COT
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EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT
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LIBS:power
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LIBS:r_pack2
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LIBS:v0402mhs03
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@ -1,4 +1,4 @@
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EESchema Schematic File Version 2 date Mon 16 Aug 2010 09:46:10 PM COT
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EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT
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LIBS:power
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LIBS:r_pack2
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LIBS:v0402mhs03
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EESchema-LIBRARY Version 2.3 Date: Mon 16 Aug 2010 09:46:10 PM COT
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EESchema-LIBRARY Version 2.3 Date: Mon 16 Aug 2010 10:43:45 PM COT
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#
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# +1.2V
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#
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Cmp-Mod V01 Genere par PcbNew le Mon 16 Aug 2010 08:22:44 PM COT
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Cmp-Mod V01 Created by CvPCB (2010-07-15 BZR 2414)-unstable date = Mon 16 Aug 2010 10:05:53 PM COT
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BeginCmp
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TimeStamp = /4C4320F3/4C5D7F9F;
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@ -721,6 +721,34 @@ ValeurCmp = 120;
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IdModule = 0402;
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EndCmp
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BeginCmp
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TimeStamp = /4C431A63/4C69E7F8;
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Reference = R17;
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ValeurCmp = 33;
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IdModule = 0402;
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EndCmp
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BeginCmp
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TimeStamp = /4C431A63/4C69E7C2;
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Reference = R18;
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ValeurCmp = 33;
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IdModule = 0402;
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EndCmp
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BeginCmp
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TimeStamp = /4C431A63/4C69E7DD;
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Reference = R19;
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ValeurCmp = 33;
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IdModule = 0402;
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EndCmp
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BeginCmp
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TimeStamp = /4C431A63/4C69E92D;
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Reference = R20;
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ValeurCmp = 33;
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IdModule = 0402;
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EndCmp
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BeginCmp
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TimeStamp = /4C431A63/4C69C6B2;
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Reference = RP1;
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@ -784,6 +812,13 @@ ValeurCmp = R_PACK4;
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IdModule = R_PACK4-0402;
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EndCmp
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BeginCmp
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TimeStamp = /4C431A63/4C69FC19;
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Reference = RP10;
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ValeurCmp = R_PACK4;
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IdModule = R_PACK4-0402;
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EndCmp
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BeginCmp
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TimeStamp = /4C431A63/4C431E53;
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Reference = U1;
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@ -840,6 +875,13 @@ ValeurCmp = X25X64MB;
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IdModule = SO8E;
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EndCmp
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BeginCmp
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TimeStamp = /4C69ED5F/4C69EE11;
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Reference = U9;
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ValeurCmp = ATTINY24A-MLF;
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IdModule = MLF20m1;
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EndCmp
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BeginCmp
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TimeStamp = /4C5F1EDC/4C5F2CA7;
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Reference = V1;
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update=Mon 16 Aug 2010 09:47:07 PM COT
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update=Mon 16 Aug 2010 10:47:37 PM COT
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version=1
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last_client=pcbnew
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[common]
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EESchema Schematic File Version 2 date Mon 16 Aug 2010 09:46:10 PM COT
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EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT
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LIBS:power
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LIBS:r_pack2
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LIBS:v0402mhs03
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