1
0
mirror of git://projects.qi-hardware.com/xue.git synced 2024-11-07 09:39:41 +02:00

DDR0 termaintor placement

This commit is contained in:
Andres Calderon 2010-08-16 22:48:30 -05:00
parent 8cf60ceb3c
commit cf1645bb44
12 changed files with 3655 additions and 3005 deletions

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 16 Aug 2010 09:46:10 PM COT
EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03

File diff suppressed because it is too large Load Diff

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 16 Aug 2010 09:46:10 PM COT
EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 16 Aug 2010 09:46:10 PM COT
EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 16 Aug 2010 09:46:10 PM COT
EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 16 Aug 2010 09:46:10 PM COT
EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03

View File

@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Mon 16 Aug 2010 09:46:10 PM COT
EESchema-LIBRARY Version 2.3 Date: Mon 16 Aug 2010 10:43:45 PM COT
#
# +1.2V
#

File diff suppressed because it is too large Load Diff

View File

@ -1,4 +1,4 @@
Cmp-Mod V01 Genere par PcbNew le Mon 16 Aug 2010 08:22:44 PM COT
Cmp-Mod V01 Created by CvPCB (2010-07-15 BZR 2414)-unstable date = Mon 16 Aug 2010 10:05:53 PM COT
BeginCmp
TimeStamp = /4C4320F3/4C5D7F9F;
@ -721,6 +721,34 @@ ValeurCmp = 120;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C431A63/4C69E7F8;
Reference = R17;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C431A63/4C69E7C2;
Reference = R18;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C431A63/4C69E7DD;
Reference = R19;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C431A63/4C69E92D;
Reference = R20;
ValeurCmp = 33;
IdModule = 0402;
EndCmp
BeginCmp
TimeStamp = /4C431A63/4C69C6B2;
Reference = RP1;
@ -784,6 +812,13 @@ ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
TimeStamp = /4C431A63/4C69FC19;
Reference = RP10;
ValeurCmp = R_PACK4;
IdModule = R_PACK4-0402;
EndCmp
BeginCmp
TimeStamp = /4C431A63/4C431E53;
Reference = U1;
@ -840,6 +875,13 @@ ValeurCmp = X25X64MB;
IdModule = SO8E;
EndCmp
BeginCmp
TimeStamp = /4C69ED5F/4C69EE11;
Reference = U9;
ValeurCmp = ATTINY24A-MLF;
IdModule = MLF20m1;
EndCmp
BeginCmp
TimeStamp = /4C5F1EDC/4C5F2CA7;
Reference = V1;

File diff suppressed because it is too large Load Diff

View File

@ -1,4 +1,4 @@
update=Mon 16 Aug 2010 09:47:07 PM COT
update=Mon 16 Aug 2010 10:47:37 PM COT
version=1
last_client=pcbnew
[common]

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Mon 16 Aug 2010 09:46:10 PM COT
EESchema Schematic File Version 2 date Mon 16 Aug 2010 10:43:45 PM COT
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03