18 Commits

Author	SHA1	Message	Date
Juan64Bits	b22aa62b24	Ethernet-phy and USB connected to FPGA	2010-08-09 15:37:18 -05:00
Andres Calderon	675d06abe3	pasive footprint added	2010-08-09 07:48:48 -05:00
Andres Calderon	3678b1cf05	more fpga ddr lines has been connected	2010-08-08 22:53:21 -05:00
Andres Calderon	bd2d314d9c	cleanup	2010-08-08 21:31:12 -05:00
Andres Calderon	9fa83a71a6	borrando basura	2010-08-08 21:29:37 -05:00
Juan64Bits	0d12fb26f4	USB and MICROSD footprints added	2010-08-08 17:54:09 -05:00
Juan64Bits	5ce4404765	Phy	2010-08-08 12:15:44 -05:00
Andres Calderon	5197a47953	ddr address and data has been conected to the FPGA	2010-08-04 20:50:31 -05:00
Andres Calderon	3e25e8dec9	ddr mobile replaced by ddr	2010-08-03 21:23:17 -05:00
Andres Calderon	1e0102079e	60fbga_ddr.mod added	2010-08-03 20:50:59 -05:00
Andres Calderon	d6bbd2dcba	60fbga_ddr.fpd added	2010-08-03 20:37:33 -05:00
Andres Calderon	a29352d997	micron_ddr_512Mb.lib fixed	2010-08-03 17:42:11 -05:00
Andres Calderon	55284358c3	micron_ddr_512Mb models added	2010-08-03 17:31:15 -05:00
Andres Calderon	1580e66a1e	only one wire connected	2010-07-28 06:48:02 -05:00
Andres Calderon	939c04d645	some ethernet phy conections	2010-07-27 20:11:18 -05:00
Andres Calderon	d79faef060	some ethernet phy conections	2010-07-27 20:09:20 -05:00
Andres Calderon	a8cbac05c9	chie renamed to xue	2010-07-24 14:02:57 -05:00
Andres Calderon	d6f7c20935	initial import	2010-07-24 06:58:53 -05:00