.. |
clean
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2 ddr decopling capacitor has been replaced
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2010-08-25 07:32:54 -05:00 |
DBG_PRG.sch
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
DRAM.sch
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
eth_phy.sch
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
expantion.sch
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
FPGA_0_2_PROG.sch
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
FPGA_1_3.sch
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
NV_MEMORIES.sch
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
PSU.sch
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
push
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FPGA has been splited
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2010-08-30 10:45:55 -05:00 |
sensor_psu.sch
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
sensor.sch
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
USB.sch
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
xue-rnc-cache.dcm
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DDR de-coupling caps. added
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2010-08-10 17:38:37 -05:00 |
xue-rnc-cache.lib
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
xue-rnc.brd
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
xue-rnc.cache.dcm
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Series resistors (DDR) added
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2010-08-16 16:32:29 -05:00 |
xue-rnc.cache.lib
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Series resistors (DDR) added
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2010-08-16 16:32:29 -05:00 |
xue-rnc.cmp
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Adding M[0] M[1] configuration and fpga crystal
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2010-11-04 21:13:46 -05:00 |
xue-rnc.erc
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ERC report generated.
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2010-09-03 10:34:54 -05:00 |
xue-rnc.net
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
xue-rnc.pro
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Some routing and revision.
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2010-11-07 12:37:25 -05:00 |
xue-rnc.pro.user
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Revition...
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2010-11-01 17:51:54 -05:00 |
xue-rnc.sch
|
Some routing and revision.
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2010-11-07 12:37:25 -05:00 |