275 lines
7.7 KiB
C
275 lines
7.7 KiB
C
/* TCP over FDDI
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*
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* Copyright 1989 Silicon Graphics, Inc. All rights reserved.
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*/
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#ifndef __SYS_FDDI_H
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#define __SYS_FDDI_H
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#ident "$Revision: 1.1 $"
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#include <sys/llc.h>
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/* what the MIB calls a FddiTimerTwosComplement */
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typedef long int fdditimer2c;
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/* convert microseconds to 80-nanosecond byte-clocks */
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#define USEC2FDDICLK(t) (((t)*100)/8)
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/* limits on the fddi timers, in byte times translated from usec */
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#define FDDI_MIN_TVX USEC2FDDICLK(-2500)
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#define FDDI_DEF_TVX USEC2FDDICLK(-4000)
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#define FDDI_MAX_TVX USEC2FDDICLK(-25000)
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#define FDDI_MIN_T_MAX USEC2FDDICLK(-165000)
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#define FDDI_MIN_T_MIN USEC2FDDICLK(-100)
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#define FDDI_MINOUT sizeof(struct smac_frame) /* smallest output frame */
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#define FDDI_MAXINFO 4478 /* maximum Info bytes in a frame */
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#define FDDI_MAXOUT (FDDI_MAXINFO \
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+sizeof(struct lmac_hdr))
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#define FDDI_MININ (FDDI_MINOUT+sizeof(FDDI_FCS)) /* smallest input frame */
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#define FDDI_MAXIN (FDDI_MAXOUT+sizeof(FDDI_FCS)) /* largest frame */
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#define FDDI_MIN_LLC (sizeof(struct fddi)) /* smallest we can do */
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#define FDDIMTU (4096+256) /* official FDDI MTU */
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/* inidicators received with each frame in mac_bits */
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#define MAC_E_BIT 0x10 /* E indicator */
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#define MAC_A_BIT 0x08 /* A indicator */
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#define MAC_C_BIT 0x04 /* C indicator */
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#define MAC_ERROR_BIT 0x02 /* bad FCS or length */
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#define MAC_DA_BIT 0x01 /* frame DA matched our DA */
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/* Frame Control values */
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#define MAC_FC_CLASS 0x80 /* C bit: 0=async, 1=sync */
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#define MAC_FC_ALEN 0x40 /* L bit: 0=short, 1=long */
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#define MAC_FC_MAC_FF 0x80
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#define MAC_FC_SMT_FF 0x00
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#define MAC_FC_LLC_FF 0x10
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#define MAC_FC_IMP_FF 0x20
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#define MAC_FC_VOID 0x00 /* void frame, without length bit */
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#define MAC_FC_BEACON (MAC_FC_ALEN|MAC_FC_MAC_FF|2) /* long address beacon */
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#define MAC_FC_CLAIM (MAC_FC_ALEN|MAC_FC_MAC_FF|3) /* long address claim */
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#define MAC_FC_SMT (MAC_FC_ALEN|MAC_FC_SMT_FF|1) /* simple SMT frame */
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#define MAC_FC_LLC(p) (MAC_FC_ALEN|MAC_FC_LLC_FF|((p)&7)) /* async LLC */
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#define MAC_FC_SMT_NSA (MAC_FC_ALEN | MAC_FC_SMT_FF | 0xf)
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#define MAC_FC_IS_MAC(fc) (((fc) & 0xb0) == MAC_FC_MAC_FF)
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#define MAC_FC_IS_VOID(fc) (((fc) & ~MAC_FC_ALEN) == MAC_FC_VOID)
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#define MAC_FC_IS_SMT(fc) (((fc)&0xb0) == MAC_FC_SMT_FF && !MAC_FC_IS_VOID(fc))
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#define MAC_FC_IS_LLC(fc) (((fc) & 0x78) == (MAC_FC_LLC_FF|MAC_FC_ALEN))
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#define MAC_FC_IS_IMP(fc) (((fc) & 0x38) == MAC_FC_IMP_FF)
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/* bits in 48-bit addresses--in "canonical bit order", not MAC hdr order */
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#define MAC_DA_IG 0x01 /* 0=Individual or 1=Group */
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#define MAC_DA_UL 0x02 /* 0=Universal or 1=Local */
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/* same bits in FDDI or SWapped bit order */
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#define MAC_DA_IG_SW 0x80
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#define MAC_DA_UL_SW 0x40
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/* is this FDDI-bit order string a group (either group or multi) address,
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* a broadcast address, or a multicast address?
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*/
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#define FDDI_ISGROUP_SW(addr) ((addr)[0] & MAC_DA_IG_SW)
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#define FDDI_ISBROAD_SW(addr) FDDI_ISBROAD(addr)
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#define FDDI_ISMULTI_SW(addr) (FDDI_ISGROUP_SW(addr) \
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&& bcmp(addr, etherbroadcastaddr, sizeof etherbroadcastaddr))
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#ifdef IRIX33 /* ugh */
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#define FDDI_ISGROUP(addr) ((addr)[0] & 0x01)
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#else
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#define FDDI_ISGROUP(addr) ETHER_ISGROUP(addr)
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#endif
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#define FDDI_ISBROAD(addr) ETHER_ISBROAD(addr)
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#define FDDI_ISMULTI(addr) ETHER_ISMULTI(addr)
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/* long and short addresses */
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typedef struct {unsigned char b[6];} LFDDI_ADDR;
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typedef struct {unsigned char b[2];} SFDDI_ADDR;
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/* filler to align tcp packets */
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#define FDDI_FILLER 3
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/* minimum Info field */
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typedef struct {unsigned long info[1];} FDDI_INFO;
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/* the Frame Check Sequence */
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typedef unsigned long FDDI_FCS;
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/* the start of any FDDI frame (using long addresses) */
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struct lmac_hdr {
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unsigned char filler[FDDI_FILLER-1]; /* align things reasonably */
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unsigned char mac_bits; /* status bits on input */
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unsigned char mac_fc; /* Frame Control */
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LFDDI_ADDR mac_da; /* destination address */
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LFDDI_ADDR mac_sa; /* source address */
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};
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/* the start of any FDDI frame (using short addresses) */
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struct smac_hdr {
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unsigned char filler[FDDI_FILLER-1];
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unsigned char mac_bits;
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unsigned char mac_fc;
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SFDDI_ADDR mac_da;
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SFDDI_ADDR mac_sa;
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};
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/* a long MAC frame */
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struct lmac_frame {
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struct lmac_hdr macf_hdr;
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FDDI_INFO macf_info;
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};
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/* a short MAC frame */
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struct smac_frame {
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struct smac_hdr macf_hdr;
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FDDI_INFO macf_info;
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};
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/* the start of an FDDI frame using LLC, before any data */
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struct fddi {
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struct lmac_hdr fddi_mac;
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struct llc fddi_llc;
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};
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/* "Drain port" numbers to select FDDI frames
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*/
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#define FDDI_PORT_SMT 1
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#define FDDI_PORT_MAC 2
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#define FDDI_PORT_IMP 3
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#define FDDI_PORT_LLC 4 /* this will change with full DSAPs */
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/* initial SGI IEEE ID, 8:0:69, in ethernet order */
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#define SGI_MAC_SA0 0x08
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#define SGI_MAC_SA1 0x00
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#define SGI_MAC_SA2 0x69
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/* FDDI SMT Multicast addresses, in FDDI bit order */
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#define FDDI_MCAST_SRF {0x01, 0x80, 0xc2, 0x00, 0x01, 0x10}
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#define FDDI_MCAST_D_BEC {0x01, 0x80, 0xc2, 0x00, 0x01, 0x00}
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#define FDDI_MCAST_D_BEC03 ((0x01 << 24) + (0x80 <<16) + (0xc2 << 8) + 0x00)
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#define FDDI_MCAST_D_BEC45 ((0x01 << 8) + 0x00)
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/* Manufacturer Data
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*/
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typedef struct smt_manfdata {
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u_char manf_oui[3]; /* Unique Id from IEEE */
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u_char manf_data[29]; /* manufacturer defined data */
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} SMT_MANUF_DATA;
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#define SGI_FDDI_MNFDATA(ifname) {SGI_MAC_SA0,SGI_MAC_SA1,SGI_MAC_SA2, \
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"Silicon Graphics ifname"}
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/* station type */
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enum fddi_st_type {
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SAS, /* Single Attachment Station */
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SAC, /* Single Attachment Concentrator */
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SM_DAS, /* single-MAC, Dual Attachment */
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DM_DAS /* dual-MAC, Dual Attach */
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};
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enum fddi_pc_type {
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PC_A=0, PC_B=1, PC_S=2, PC_M=3, PC_UNKNOWN=4
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};
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/* target for the PCM machine */
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enum pcm_tgt {
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PCM_DEFAULT=0,
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PCM_NONE, /* either repeat or MAC-insert */
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PCM_CMT /* run the state machine */
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};
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/* PHY line states */
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enum pcm_ls {
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PCM_QLS=0, PCM_ILS=1, PCM_MLS=2, PCM_HLS=3,
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PCM_ALS=4, PCM_ULS, PCM_NLS, PCM_LSU
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};
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#define NUM_PCM_LS 8
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/* one character labels for the enumeration for debugging printfs */
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#define PCM_LS_LABELS {"Q", "I", "M", "H", "A", "U", "N", "L"}
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enum mac_states {
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MAC_OFF, /* hardware off */
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MAC_IDLE, /* "MAC reset" */
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MAC_CLAIMING,
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MAC_BEACONING,
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MAC_ACTIVE /* normal state */
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};
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#define NUM_MAC_STATES 5
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/* PCM states similar to the official ones */
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enum pcm_state {
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PCM_ST_OFF =0, /* PC0 */
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PCM_ST_BREAK =1, /* PC1 */
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PCM_ST_TRACE =2, /* PC2 */
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PCM_ST_CONNECT =3, /* PC3 */
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PCM_ST_NEXT =4, /* PC4 */
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PCM_ST_SIGNAL =5, /* PC5 */
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PCM_ST_JOIN =6, /* PC6 */
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PCM_ST_VERIFY =7, /* PC7 */
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PCM_ST_ACTIVE =8, /* PC8 */
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PCM_ST_MAINT =9, /* PC9 */
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PCM_ST_BYPASS =20 /* waiting for bypass--EC5 or EC7 */
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};
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/* official SMT times, in microseconds */
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#define SMT_A_MAX 200 /* max signal acquisition */
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#define SMT_TL_MIN 30 /* transmit for this long */
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#define SMT_C_MIN (2*1000) /* minimum time in CONNECT */
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#define SMT_I_MAX (25*1000) /* optical bypass delays */
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#define SMT_TB_MIN (5*1000) /* minimum BREAK time */
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#define SMT_TB_MAX (50*1000) /* BREAK time until BS_Flag set */
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#define SMT_T_OUT (100*1000) /* signalling timeout */
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#define SMT_T_NEXT9 (200*1000) /* MAC Local Loop */
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#define SMT_TRACE_MAX (7*1000*1000) /* wait for TRACE this long */
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#define SMT_NS_MAX 1311 /* 1.31072 msec */
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#define LC_SHORT (50*1000) /* LCT durations */
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#define LC_MEDIUM (500*1000)
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#define LC_LONG (5*1000*1000)
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#define LC_EXTENDED (50*1000*1000)
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/* not official */
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#define SMT_DRAG (30*1000*1000) /* stop signaling this long if
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* the other side is crazy
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*/
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/* LEM values */
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#define SMT_LER_CUT_DEF 7 /* default, min, & max LER_Cutoff */
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#define SMT_LER_CUT_MIN 4 /* exponents */
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#define SMT_LER_CUT_MAX 15
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#define SMT_LER_ALM_DEF 8 /* LER_Alarm values */
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#define SMT_LER_ALM_MIN SMT_LER_CUT_MIN
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#define SMT_LER_ALM_MAX SMT_LER_CUT_MAX
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#endif /* __SYS_FDDI_H */
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