594 lines
14 KiB
C
594 lines
14 KiB
C
#ident "$Id: monitor.h,v 1.1 1994/07/20 22:55:02 davidl Exp $"
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/**************************************************************************
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* *
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* Copyright (C) 1993, Silicon Graphics, Inc. *
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* *
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* These coded instructions, statements, and computer programs contain *
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* unpublished proprietary information of Silicon Graphics, Inc., and *
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* are protected by Federal copyright law. They may not be disclosed *
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* to third parties or copied or duplicated in any form, in whole or *
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* in part, without the prior written consent of Silicon Graphics, Inc. *
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* *
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**************************************************************************/
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/*
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* Machine Specific Defines
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*/
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#undef NVRAM_BASE
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#undef DUART0_BASE
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#undef LED_BASE
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#ifdef RC6280
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#define LED_BASE (LED_REG_R6300 | K1BASE)
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#define DUART0_BASE (DUART0_BASE_R6300 | K1BASE)
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#define NVRAM_BASE (TODC_CLOCK_ADDR_R6300 | K1BASE)
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#define K1MEM_MAXMB 384 /* max main memory in k1seg */
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#define K1MEM_MAX (384<<20) /* max main memory in k1seg */
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#define HIMEM_BASE (512<<20) /* base address of memory above 384MB */
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#endif
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#ifdef RB3125
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#define LED_BASE (LED_REG_R3200 | K1BASE)
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#define DUART0_BASE (DUART0_BASE_R3200 | K1BASE)
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#define NVRAM_BASE (TODC_CLOCK_ADDR_R3200 | K1BASE)
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#define K1MEM_MAXMB 384 /* max main memory in k1seg */
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#define K1MEM_MAX (384<<20) /* max main memory in k1seg */
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#endif
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#ifdef IP24
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#define TODC_CLOCK_ADDR_R4230 0x1fbe0000 /* MK48T02 on aftershock */
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#define NVRAM_BASE (TODC_CLOCK_ADDR_R4230 | K1BASE)
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#define LED_BASE 0xbbfd9870
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#define PROM_RESET 0xa0000000 | 0x1fc00000
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#endif
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#if !defined(IP24) & defined(IP22)
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#define TODC_CLOCK_ADDR_R4230 0x1fbe0000 /* MK48T02 on aftershock */
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#define NVRAM_BASE (TODC_CLOCK_ADDR_R4230 | K1BASE)
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#define LED_BASE 0xbbfd9870
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#define PROM_RESET 0xa0000000 | 0x1fc00000
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#endif
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/*
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* ASCII characters
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*/
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#define char_BL 0x07 /* bell */
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#define char_BS 0x08 /* backspace */
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#define char_NL 0x0A /* new line */
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#define char_CR 0x0D /* carriage return */
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#define char_DEL 0x7f /* delete */
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#define char_TAB 0x09 /* tab */
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#define char_ESC 0x1B /* escape */
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#define char_CTRLC 0x03 /* ctrl-C */
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#define char_SP 0x20 /* ' ' */
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#define char_DASH 0x2D /* '-' */
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#define char_A 0x41 /* 'A' */
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#define char_B 0x42 /* 'B' */
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#define char_C 0x43 /* 'C' */
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#define char_D 0x44 /* 'D' */
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#define char_E 0x45 /* 'E' */
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#define char_F 0x46 /* 'F' */
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#define char_G 0x47 /* 'G' */
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#define char_H 0x48 /* 'H' */
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#define char_I 0x49 /* 'I' */
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#define char_J 0x4A /* 'J' */
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#define char_K 0x4B /* 'K' */
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#define char_L 0x4C /* 'L' */
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#define char_M 0x4D /* 'M' */
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#define char_N 0x4E /* 'N' */
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#define char_O 0x4F /* 'O' */
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#define char_P 0x50 /* 'P' */
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#define char_Q 0x51 /* 'Q' */
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#define char_R 0x52 /* 'R' */
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#define char_S 0x53 /* 'S' */
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#define char_T 0x54 /* 'T' */
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#define char_U 0x55 /* 'U' */
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#define char_V 0x56 /* 'V' */
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#define char_W 0x57 /* 'W' */
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#define char_X 0x58 /* 'X' */
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#define char_Y 0x59 /* 'Y' */
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#define char_Z 0x5A /* 'Z' */
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#define char_a 0x61 /* 'a' */
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#define char_f 0x66 /* 'f' */
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#define char_y 0x79 /* 'y' */
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#define char_0 0x30 /* '0' */
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#define char_1 0x31 /* '1' */
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#define char_2 0x32 /* '2' */
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#define char_3 0x33 /* '3' */
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#define char_4 0x34 /* '4' */
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#define char_5 0x35 /* '5' */
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#define char_6 0x36 /* '6' */
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#define char_7 0x37 /* '7' */
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#define char_9 0x39 /* '9' */
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/*
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* Address conversion macros
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*/
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#ifndef LANGUAGE_C
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#define X_TO_K0(x) (((x)&0x1FFFFFFF)|K0BASE) /* x to kseg0 */
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#define X_TO_K1(x) (((x)&0x1FFFFFFF)|K1BASE) /* x to kseg1 */
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#define X_TO_PHYS(x) ((x)&0x1FFFFFFF) /* x to physical */
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#else
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#define X_TO_K0(x) (((unsigned)(x)&0x1FFFFFFF)|K0BASE) /* x to kseg0 */
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#define X_TO_K1(x) (((unsigned)(x)&0x1FFFFFFF)|K1BASE) /* x to kseg1 */
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#define X_TO_PHYS(x) ((unsigned)(x)&0x1FFFFFFF) /* x to physical */
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#endif
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/*
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* Execution Control
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*/
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#define UNCACHED 0
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#define CACHED 1
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#define KSEG_MASK 0xE0000000 /* 3 MSB */
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#define TESTSZ_MAX 1024*8 /* max code size as default for cache_load() */
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#define RUN_ONETEST 0 /* test execution mode */
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#define RUN_ALLTESTS 1
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#define RUN_ALLMODS 2 /* run all test modules */
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/*
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* Default values
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*/
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#define ERRLIMIT_DEFAULT 16
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#define ERRMODE_DEFAULT ERR_EXIT /* exit on error */
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#define LOOPLMT_DEFAULT 1
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#define C0ERR_DEFAULT 0x0F /* ignore all parity err exceptions */
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#define N_DFLT 0xdeadbeef /* default for numeric input */
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/*
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* Display Control
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*/
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#define COLUMN_WIDTH 40 /* menu column width */
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/*
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* Test Table
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*/
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#define TBL_ENDMARK 0
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#ifdef LANGUAGE_C
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typedef struct test_tbl {
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char *test_title; /* test description string */
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int (*testptr)(); /* ptr to test routine */
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unsigned code_size; /* (bytes) used when icached=CACHED */
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unsigned icached; /* UNCACHED or CACHED */
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unsigned bev_off; /* set to clear C0_SR_BEV bit */
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unsigned parm1; /* parameter passed to test routine */
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} TEST_TBL;
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#endif
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/*
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* Warning: Always update the following defines when changing
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* the test table structure.
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*/
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#define TTBLENTRY_SIZE 24 /* bytes */
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#define OFFSET_TITLE 0 /* offset within the record in bytes */
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#define OFFSET_TEST OFFSET_TITLE +4
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#define OFFSET_CODESZ OFFSET_TEST +4
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#define OFFSET_ICACHED OFFSET_CODESZ +4
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#define OFFSET_BEVOFF OFFSET_ICACHED+4
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#define OFFSET_PARM1 OFFSET_BEVOFF +4
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/*
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* Command Table
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*/
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#ifdef LANGUAGE_C
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typedef struct cmd_tbl {
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char *cmdstr; /* command string ptr */
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unsigned cmdlen; /* number of chars for command lookup */
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int (*cmdptr)(); /* command handler */
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unsigned cmd_icached; /* UNCACHED or CACHED */
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unsigned parm1; /* parameter passed to command hndlr */
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} CMD_TBL;
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#endif
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#define CTBLENTRY_SIZE 20
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#define OFFSET_CMDSTR 0
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#define OFFSET_CMDLEN OFFSET_CMDSTR +4
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#define OFFSET_CMDPTR OFFSET_CMDLEN +4
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#define OFFSET_CMDICACHED OFFSET_CMDPTR +4
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#define OFFSET_CMDPARM1 OFFSET_CMDICACHED+4
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/*
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* NVRAM Based Variables
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*
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* M/6000: 2KB NVRAM addressed in word boundary. Last 8 bytes are TODC.
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* In SA/prom/prom.h, it defines:
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* Byte 0 to 49 for MIPS os use, 50 - 1023 potential use by MIPS
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* Byte 1024 - 1024+512 for OEM use
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*
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* The diags monitor uses space after the OEM area: 0x0600 - end.
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* TODO: Reserve this space for diags monitor use.
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*
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* The following three lines are defined in mk48t02.h
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*
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* #define TODC_NVRAM_SIZE 0x7f8 -* NVRAM size on this chip *-
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* #define TODC_MEM_OFFSET 0x3 -* NVRAM byte offset *-
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* #define TODC_MEMX(x) (x<<2) -* For byte access *-
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*
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* TODC_CLOCK_ADDR[] is defined in saio/machaddr.c
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* TODC_CLOCK_ADDR_R6300 is defined in cpu_board.h
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*/
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#ifdef MIPSEB
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#define NVRAM_BASE_BYTE (NVRAM_BASE + 3)
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#endif /*MIPSEB*/
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#ifdef MIPSEL
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#define NVRAM_BASE_BYTE NVRAM_BASE
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#endif /*MIPSEL*/
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#define NVRAM_BYTE0(x) (NVRAM_BASE_BYTE+((x)<<2)+0)
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#define NVRAM_BYTE1(x) (NVRAM_BASE_BYTE+((x)<<2)+4)
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#define NVRAM_BYTE2(x) (NVRAM_BASE_BYTE+((x)<<2)+8)
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#define NVRAM_BYTE3(x) (NVRAM_BASE_BYTE+((x)<<2)+12)
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#define NVWORD 4
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#define NVHWORD 2
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#define NVBYTE 1
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#ifdef R4230
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#define NVDIAG_BASE 0x0700
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#elif defined(RC6380MP)
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#define NVDIAG_BASE 0x0400
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#else
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#define NVDIAG_BASE 0x0600
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#endif
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#ifdef RC6380MP
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#define NVDIAG_END 0x05f8
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#else
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#define NVDIAG_END 0x07f8 /* last 8 bytes are TODC */
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#endif /*RC6380MP*/
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/*
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* Main memory size in bytes
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*/
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#define _MEMSIZE NVDIAG_BASE
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#define _MEMSIZE_LEN 4
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/*
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* First address for memory tests
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*/
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#define _FIRSTADDR (_MEMSIZE+_MEMSIZE_LEN)
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#define _FIRSTADDR_LEN 4
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/*
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* Size of memory to be tested by memory tests
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*/
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#define _LASTADDR (_FIRSTADDR+_FIRSTADDR_LEN)
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#define _LASTADDR_LEN 4
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/*
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* Monitor Flag
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* - A bit field for various hardware states.
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* A 1 in a bit indicates "yes" or "true", a 0 "no" or "false".
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* - See "pdiag.h" for bit mask definition.
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*
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* Bit 0 - Main memory initialized
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*/
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#define _DIAG_FLAG (_LASTADDR +_LASTADDR_LEN)
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#define _DIAG_FLAG_LEN 4
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/*
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* Sys Config & test status variable: Saved copy of CnfgStatusReg
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* See "pdiag.h" for bit field definition.
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*/
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#define _CNFGSTATUS (_DIAG_FLAG+_DIAG_FLAG_LEN)
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#define _CNFGSTATUS_LEN 4
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/*
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* C0_ERROR Register's I Mask
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*/
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#define _C0ERRIMASK (_CNFGSTATUS+_CNFGSTATUS_LEN)
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#define _C0ERRIMASK_LEN 4
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/*
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* Loop limit: 0 - loop forever
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*/
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#define _LOOPLMT (_C0ERRIMASK+_C0ERRIMASK_LEN)
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#define _LOOPLMT_LEN 4
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/*
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* Current pass count
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*/
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#define _PASSCNT (_LOOPLMT+_LOOPLMT_LEN)
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#define _PASSCNT_LEN 4
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/*
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* Error limit
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*/
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#define _ERRORLMT (_PASSCNT+_PASSCNT_LEN)
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#define _ERRORLMT_LEN 4
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/*
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* Total error count
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*/
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#define _ERRORCNT (_ERRORLMT+_ERRORLMT_LEN)
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#define _ERRORCNT_LEN 4
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/*
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* Current test number
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*/
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#define _TESTINDX (_ERRORCNT+_ERRORCNT_LEN)
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#define _TESTINDX_LEN 1
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/*
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* Current module number in execution of run all modules
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*/
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#define _MODINDX (_TESTINDX+_TESTINDX_LEN)
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#define _MODINDX_LEN 1
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/*
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* Test execution mode:
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* 0 - run a single test in a module
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* 1 - run the entire test suite in a module
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* 2 - run all test modules
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*/
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#define _RUNMODE (_MODINDX+_MODINDX_LEN)
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#define _RUNMODE_LEN 1
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/*
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* Ptr to current test module name
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*/
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#define _MODNAME (_RUNMODE+_RUNMODE_LEN)
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#define _MODNAME_LEN 4
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/*
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* Ptr to the current test module table
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*/
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#define _TTBLPTR (_MODNAME+_MODNAME_LEN)
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#define _TTBLPTR_LEN 4
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/*
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* ptr to the command table in use
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*/
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#define _CMDTBLPTR (_TTBLPTR+_TTBLPTR_LEN)
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#define _CMDTBLPTR_LEN 4
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/*
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* nvram stack pointer
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*/
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#define _NV_SP (_CMDTBLPTR+_CMDTBLPTR_LEN)
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#define _NV_SP_LEN 4
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/*
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* console i/o buffer
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* Command string buffer
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*/
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#define _NVBUF (_NV_SP+_NV_SP_LEN)
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#define _NVBUF_LEN 50
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/*
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* console i/o buffer
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* Temporary command string buffer
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*/
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#define _NVBUF2 (_NVBUF+_NVBUF_LEN)
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#define _NVBUF2_LEN 50
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/*
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* Offset of last byte used
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*/
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#define NVDIAG_LAST (_NVBUF2+_NVBUF2_LEN)
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#if defined(IP24) | defined(IP22)
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#if ((NVDIAG_END-NVDIAG_LAST) < 0x40)
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#include "ERROR -- Non-Volatile RAM overflow (less than 64b for nvram stack)"
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#endif
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#else
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#if ((NVDIAG_END-NVDIAG_LAST) < 0x100)
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#include "ERROR -- Non-Volatile RAM overflow (less than 256b for nvram stack)"
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#endif
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#endif
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/*
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* Byte offset of nv-stack-base & nv-stack-end
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*/
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#define NVSTACK_BASE (NVDIAG_END-8)
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#define NVSTACK_END (NVDIAG_LAST+4)
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/*
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* NVRAM read/write macros
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*/
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/*
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* Load NVRAM value into _reg
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*
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* x - byte index
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*/
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#define LB_NVRAM(_reg,x) \
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lbu _reg,NVRAM_BYTE0(x); \
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move zero,zero; /* in case noreorder enabled */
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/*
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* Use Big Endian
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*
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* warning: v1 used
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*/
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#define LH_NVRAM(_reg,x) \
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lbu _reg,NVRAM_BYTE0(x); \
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lbu v1,NVRAM_BYTE1(x); \
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sll _reg,8; \
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or _reg,v1;
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/*
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* Use Big Endian
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*
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* warning: v1 used
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*/
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#define LW_NVRAM(_reg,x) \
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lbu _reg,NVRAM_BYTE0(x); \
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lbu v1,NVRAM_BYTE1(x); \
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sll _reg,8; \
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or _reg,v1; \
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lbu v1,NVRAM_BYTE2(x); \
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sll _reg,8; \
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or _reg,v1; \
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lbu v1,NVRAM_BYTE3(x); \
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sll _reg,8; \
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or _reg,v1;
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/*
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* store _reg into NVRAM
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*/
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#define SB_NVRAM(_reg,x) \
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sb _reg,NVRAM_BYTE0(x); \
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move zero,zero; /* in case noreorder enabled */
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/*
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* Use Big Endian
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*/
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#define SH_NVRAM(_reg,x) \
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ror _reg,8; \
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sb _reg,NVRAM_BYTE0(x); \
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rol _reg,8; \
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sb _reg,NVRAM_BYTE1(x); \
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move zero,zero; /* in case noreorder enabled */
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/*
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* Use Big Endian
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*/
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#define SW_NVRAM(_reg,x) \
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rol _reg,8; \
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sb _reg,NVRAM_BYTE0(x); \
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rol _reg,8; \
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sb _reg,NVRAM_BYTE1(x); \
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rol _reg,8; \
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sb _reg,NVRAM_BYTE2(x); \
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rol _reg,8; \
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sb _reg,NVRAM_BYTE3(x); \
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move zero,zero; /* in case noreorder enabled */
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/*
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* set address of NVRAM byte x in _reg
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*/
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#ifdef NVRAM_ADDR
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#include "error - NVRAM_ADDR() macro already defined in other files "
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#else
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#define NVRAM_ADDR(_reg,x) \
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li _reg,NVRAM_BYTE0(x);
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#endif /* NVRAM_ADDR */
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/*
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* PUSH a word on nvram stack
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*
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* registers used: v1, t0 & t1
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*/
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#define PUSH_NVRAM(_reg) \
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LW_NVRAM(t0,_NV_SP) \
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rol _reg,8; \
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sb _reg,(t0); \
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rol _reg,8; \
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sb _reg,4(t0); \
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rol _reg,8; \
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sb _reg,8(t0); \
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rol _reg,8; \
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sb _reg,12(t0); \
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move zero,zero; /* in case noreorder enabled */ \
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subu t0,16; \
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NVRAM_ADDR(t1, NVSTACK_END) \
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bgeu t0,t1,1f; \
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move zero,zero; /* in case noreorder enabled */ \
|
|
j _nvstack_overflow; \
|
|
move zero,zero; /* in case noreorder enabled */ \
|
|
1: SW_NVRAM(t0,_NV_SP)
|
|
|
|
/*
|
|
* POP a word from nvram stack
|
|
*
|
|
* registers used: v1, t0 & t1
|
|
*
|
|
*/
|
|
#define POP_NVRAM(_reg) \
|
|
LW_NVRAM(t0,_NV_SP) \
|
|
addu t0,16; \
|
|
NVRAM_ADDR(t1, NVSTACK_BASE) \
|
|
bleu t0,t1,1f; \
|
|
move zero,zero; /* in case noreorder enabled */ \
|
|
j _nvstack_underflow; \
|
|
move zero,zero; /* in case noreorder enabled */ \
|
|
1: lbu _reg,(t0); \
|
|
lbu t1,4(t0); \
|
|
sll _reg,8; \
|
|
or _reg,t1; \
|
|
lbu t1,8(t0); \
|
|
sll _reg,8; \
|
|
or _reg,t1; \
|
|
lbu t1,12(t0); \
|
|
sll _reg,8; \
|
|
or _reg,t1; \
|
|
SW_NVRAM(t0,_NV_SP)
|
|
|
|
/*
|
|
* I/O MACROS
|
|
*/
|
|
#define PRINT(_msg) \
|
|
la a0, 90f; \
|
|
jal _puts; \
|
|
move zero, zero; /* in case noreorder enabled */ \
|
|
.data; \
|
|
90:; \
|
|
.align 2; \
|
|
.asciiz _msg; \
|
|
.text; \
|
|
.align 2;
|
|
|
|
#define PUTS(_msg) \
|
|
la a0,_msg; \
|
|
jal _puts; \
|
|
move zero, zero; /* in case noreorder enabled */
|
|
|
|
#define PUTHEX(reg) \
|
|
move a0,reg; \
|
|
jal puthex; \
|
|
move zero, zero; /* in case noreorder enabled */
|
|
|
|
#define PUTUDEC(_reg) \
|
|
move a0, _reg; \
|
|
move a1, zero; \
|
|
jal putudec; \
|
|
move zero, zero; /* in case noreorder enabled */
|
|
|
|
#define PUTDEC(_reg) \
|
|
move a0, _reg; \
|
|
move a1, zero; \
|
|
jal putdec; \
|
|
move zero, zero; /* in case noreorder enabled */
|
|
|
|
/*
|
|
* SET_LED() & SET_LEDS() - Light up the leds
|
|
*
|
|
* Uses registers a0, v0, v1 & ra.
|
|
*/
|
|
#define SET_LED(CODE) \
|
|
li a0, CODE; \
|
|
jal set_leds; \
|
|
move zero, zero; /* in case noreorder enabled */
|
|
|
|
#define SET_LEDS(_reg) \
|
|
move a0, _reg; \
|
|
jal set_leds; \
|
|
move zero, zero; /* in case noreorder enabled */
|
|
|
|
|
|
/* end */
|