opencode.siil.arti.ee
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Joined on 2026-11-11
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opencode.siil.art… pushed to m4 at opencode.siil.art…/tms-c-compiler 2026-11-12 14:23:08 +02:00
5d980dc6e3 tests/docs: final M4 review fixes
opencode.siil.art… pushed to m4 at opencode.siil.art…/llvm-tms34010 2026-11-12 14:23:07 +02:00
de5a365596 tms34010: clarify M4 carry-forwards and hash wording
opencode.siil.art… pushed to m4 at opencode.siil.art…/tms-c-compiler 2026-11-12 14:04:39 +02:00
1511919437 tests/docs: fix M4 review findings in bands, symbols and diff check
opencode.siil.art… pushed to m4 at opencode.siil.art…/tms-c-compiler 2026-11-12 13:49:38 +02:00
2d5ed90fb2 tests: M4 Xlib images, events and the termtris integration
1a91329864 tests: M4 termtris integration and varargs ABI gate
fb0159620e tests: validate the image blitter copy and assert window focus
26697b9585 tests: M4 1-bit XImage, real key events, and the MAME image gate
7946519828 symbols: correct XMapWindow, add XImage/XG entries and validation
Compare 13 commits »
opencode.siil.art… pushed to m4 at opencode.siil.art…/llvm-tms34010 2026-11-12 13:49:36 +02:00
61ee9bbc99 tms34010: M4 function pointers, XImage/events and termtris support
b08e57424a tms34010: reject narrow last-fixed varargs anchors
6261ac442a tms34010: M4 varargs, narrow arguments, and termtris scalar fixes
3c810ec0be tms34010: fix high-bit target constants in compares
a49c934380 tms34010: add CALL Rs and function-pointer calls
Compare 8 commits »
opencode.siil.art… pushed to termtris at opencode.siil.art…/vt1200 2026-11-12 07:57:01 +02:00
8df2320d6d docs(termtris): re-run acceptance at the VR319 default
ce40582e9d fix(termtris): run the 2ine loader under qemu-i386 when the kernel lacks 16-bit LDT
Compare 2 commits »
opencode.siil.art… created repository opencode.siil.art…/vt1200 2026-11-12 07:30:52 +02:00
opencode.siil.art… pushed to m4 at opencode.siil.art…/llvm-tms34010 2026-11-12 07:25:56 +02:00
opencode.siil.art… created branch m4 in opencode.siil.art…/llvm-tms34010 2026-11-12 07:25:55 +02:00
opencode.siil.art… pushed to m4 at opencode.siil.art…/tms-c-compiler 2026-11-12 07:25:48 +02:00
dbf71bdc5f docs: M4 Xlib images, events and termtris integration plan
opencode.siil.art… created branch m4 in opencode.siil.art…/tms-c-compiler 2026-11-12 07:25:48 +02:00
opencode.siil.art… opened issue arti/vt1200#4 2026-11-12 07:22:50 +02:00
docs: add the ROM XImage entry points and the supported 1-bit XPutImage format
opencode.siil.art… opened issue arti/vt1200#3 2026-11-12 07:22:50 +02:00
loader.lua: the completion check is empty and a fixed LOADER_END truncates slow clients
opencode.siil.art… opened issue arti/vt1200#2 2026-11-12 07:22:50 +02:00
loader children: document the per-process XG block required before XOpenDisplay (XNextEvent is silent without it)
opencode.siil.art… opened issue arti/vt1200#1 2026-11-12 07:22:34 +02:00
docs: XMapWindow is 0x3FD64F60; 0x3FD645B0 is XRaiseWindow (ConfigureWindow opcode 12)
opencode.siil.art… pushed to m3 at opencode.siil.art…/llvm-tms34010 2026-11-11 22:30:42 +02:00
73c85350a4 tms34010: correct M3 encodings and narrow-load docs
opencode.siil.art… pushed to m3 at opencode.siil.art…/tms-c-compiler 2026-11-11 22:30:42 +02:00
24f877362b docs: finalize M3 limitations and M4 prerequisites
opencode.siil.art… pushed to m3 at opencode.siil.art…/llvm-tms34010 2026-11-11 22:07:00 +02:00
1968ccd39b docs: correct M3 milestone wording
opencode.siil.art… pushed to m3 at opencode.siil.art…/tms-c-compiler 2026-11-11 22:07:00 +02:00
2681be26c0 tests: anchor the M3 Xlib displacement checks
opencode.siil.art… pushed to m3 at opencode.siil.art…/llvm-tms34010 2026-11-11 21:56:22 +02:00
8d088c40df docs: M3 branches and Xlib window
afb4ad2eef tms34010: allow misaligned loads/stores
05762fceb8 tms34010: add integer comparisons, branches and ALU ops
bbc591b77c tms34010: add JAcc branches and GSPA-safe block labels
Compare 4 commits »