2011-01-08 14:45:52 +02:00
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PLOT_BRD = pcbnew --plot=ps_a4 --ps-pads-drill-opt=none --fill-all-zones
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2011-03-15 04:45:01 +02:00
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CPTX = ../../eda-tools/mlztx/cptx
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2011-03-15 06:16:44 +02:00
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GMERGE = ../../eda-tools/gerber/gmerge
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2011-01-08 14:45:52 +02:00
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2011-01-17 16:27:28 +02:00
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NAME = atben
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2011-03-15 02:41:41 +02:00
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VERSION = 110314
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2011-03-11 21:05:30 +02:00
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DIR = $(NAME)
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Added components (transistor and balun) for the uSD variant.
- atusd/Makefile:
- AUTHORS, atusd/Makefile, atusd/dtc123.lib, atusd/dtc123je.fpd: borrowed
the DTC123 symbol (Alvaro Lopes) and footprint (Dave Ball) from
gta02-core. Note that this isn't the part I'm using in my prototype, and
I'm trying to get rid of it entirely, so all this will change before too
long.
- components/BOOKSHELF, components/INFO, components/balun.lib,
modules/Makefile, modules/INFO, modules/0805-6.fpd: added the Wuerth
748421245 balun
makefile
2010-09-03 00:05:15 +03:00
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2011-01-08 14:45:52 +02:00
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.PHONY: all gen generate sch brd xpdf front back clean
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2011-02-19 16:43:19 +02:00
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.PHONY: gerber gerbv
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Added components (transistor and balun) for the uSD variant.
- atusd/Makefile:
- AUTHORS, atusd/Makefile, atusd/dtc123.lib, atusd/dtc123je.fpd: borrowed
the DTC123 symbol (Alvaro Lopes) and footprint (Dave Ball) from
gta02-core. Note that this isn't the part I'm using in my prototype, and
I'm trying to get rid of it entirely, so all this will change before too
long.
- components/BOOKSHELF, components/INFO, components/balun.lib,
modules/Makefile, modules/INFO, modules/0805-6.fpd: added the Wuerth
748421245 balun
makefile
2010-09-03 00:05:15 +03:00
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2011-01-08 14:52:59 +02:00
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all:
|
Added components (transistor and balun) for the uSD variant.
- atusd/Makefile:
- AUTHORS, atusd/Makefile, atusd/dtc123.lib, atusd/dtc123je.fpd: borrowed
the DTC123 symbol (Alvaro Lopes) and footprint (Dave Ball) from
gta02-core. Note that this isn't the part I'm using in my prototype, and
I'm trying to get rid of it entirely, so all this will change before too
long.
- components/BOOKSHELF, components/INFO, components/balun.lib,
modules/Makefile, modules/INFO, modules/0805-6.fpd: added the Wuerth
748421245 balun
makefile
2010-09-03 00:05:15 +03:00
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@echo "make what ? target: gen sch brd xpdf"
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@exit 1
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gen generate:
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2011-03-13 09:43:50 +02:00
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eeschema --plot=ps `pwd`/$(NAME).sch
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Added components (transistor and balun) for the uSD variant.
- atusd/Makefile:
- AUTHORS, atusd/Makefile, atusd/dtc123.lib, atusd/dtc123je.fpd: borrowed
the DTC123 symbol (Alvaro Lopes) and footprint (Dave Ball) from
gta02-core. Note that this isn't the part I'm using in my prototype, and
I'm trying to get rid of it entirely, so all this will change before too
long.
- components/BOOKSHELF, components/INFO, components/balun.lib,
modules/Makefile, modules/INFO, modules/0805-6.fpd: added the Wuerth
748421245 balun
makefile
2010-09-03 00:05:15 +03:00
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# need scripts
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sch:
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2011-01-08 14:51:47 +02:00
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eeschema `pwd`/$(NAME).sch
|
Added components (transistor and balun) for the uSD variant.
- atusd/Makefile:
- AUTHORS, atusd/Makefile, atusd/dtc123.lib, atusd/dtc123je.fpd: borrowed
the DTC123 symbol (Alvaro Lopes) and footprint (Dave Ball) from
gta02-core. Note that this isn't the part I'm using in my prototype, and
I'm trying to get rid of it entirely, so all this will change before too
long.
- components/BOOKSHELF, components/INFO, components/balun.lib,
modules/Makefile, modules/INFO, modules/0805-6.fpd: added the Wuerth
748421245 balun
makefile
2010-09-03 00:05:15 +03:00
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brd:
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2011-01-08 14:51:47 +02:00
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pcbnew `pwd`/$(NAME).brd
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Added components (transistor and balun) for the uSD variant.
- atusd/Makefile:
- AUTHORS, atusd/Makefile, atusd/dtc123.lib, atusd/dtc123je.fpd: borrowed
the DTC123 symbol (Alvaro Lopes) and footprint (Dave Ball) from
gta02-core. Note that this isn't the part I'm using in my prototype, and
I'm trying to get rid of it entirely, so all this will change before too
long.
- components/BOOKSHELF, components/INFO, components/balun.lib,
modules/Makefile, modules/INFO, modules/0805-6.fpd: added the Wuerth
748421245 balun
makefile
2010-09-03 00:05:15 +03:00
|
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|
xpdf:
|
2011-01-08 14:51:47 +02:00
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xpdf $(NAME).pdf
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2011-01-08 14:45:52 +02:00
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2011-01-08 14:51:47 +02:00
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front: $(NAME)-Front.ps
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2011-01-08 14:45:52 +02:00
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lpr $<
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|
2011-01-08 14:51:47 +02:00
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|
back: $(NAME)-Back.ps
|
2011-01-08 14:45:52 +02:00
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lpr $<
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2011-03-14 08:29:33 +02:00
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# Copy text from front copper to front silk screen
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2011-03-15 04:45:01 +02:00
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cptx:
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$(CPTX) -i $(NAME).brd 15 51950 30550 21 51950 30550
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2011-03-14 08:29:33 +02:00
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2011-03-13 04:32:12 +02:00
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# --- Industrial production ---------------------------------------------------
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2011-03-11 21:05:30 +02:00
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PCB_FILES = README-PCB $(NAME)-PCB_Edges.dxf $(NAME).drl \
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$(NAME)-SilkS_Front.gto $(NAME)-Mask_Front.gts \
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$(NAME)-Front.gtl $(NAME)-Back.gbl $(NAME)-Mask_Back.gbs \
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$(NAME)-PCB_Edges.gbr
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2011-02-19 16:43:19 +02:00
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gerber:
|
2011-03-14 17:21:51 +02:00
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pcbnew --plot=gerber --origin=aux \
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2011-03-13 04:32:12 +02:00
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-l `pcbnew --list-layers $(NAME).brd | tr '\012' ,` \
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2011-03-13 02:55:15 +02:00
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--fill-all-zones $(NAME).brd \
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--exclude-pcb-edge
|
2011-03-15 06:16:44 +02:00
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$(GMERGE) $(NAME)-SilkS_Front.gto $(NAME)-Comments.gbr >_tmp \
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|| { rm -rf _tmp; exit 1; }
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mv _tmp $(NAME)-SilkS_Front.gto
|
2011-02-19 16:43:19 +02:00
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|
2011-03-11 21:05:30 +02:00
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|
fab: gerber
|
2011-03-14 17:21:51 +02:00
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|
pcbnew --plot=dxf --origin=aux -l PCB_Edges $(NAME).brd
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pcbnew --drill --origin=aux $(NAME).brd
|
2011-03-15 05:25:10 +02:00
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|
mkdir -p fab
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tar Ccfz .. fab/$(NAME)-pcb-$(VERSION).tar.gz \
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2011-03-14 05:33:40 +02:00
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$(PCB_FILES:%=$(DIR)/%)
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2011-03-15 05:25:10 +02:00
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|
cd ..; zip -l $(DIR)/fab/$(NAME)-pcb-$(VERSION).zip \
|
2011-03-11 21:05:30 +02:00
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$(PCB_FILES:%=$(DIR)/%)
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|
2011-02-19 16:43:19 +02:00
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|
gerbv:
|
2011-03-15 06:16:44 +02:00
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|
gerbv $(NAME)-SilkS_Front.gto \
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2011-02-19 16:43:19 +02:00
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$(NAME)-SoldP_Front.gtp \
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|
$(NAME)-Front.gtl \
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|
$(NAME)-Mask_Front.gts \
|
2011-03-13 02:55:15 +02:00
|
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|
$(NAME)-Back.gbl
|
2011-02-19 16:43:19 +02:00
|
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|
2011-03-14 05:33:40 +02:00
|
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|
upload:
|
2011-03-15 05:25:10 +02:00
|
|
|
qippl fab/$(NAME)-pcb-$(VERSION).tar.gz \
|
|
|
|
fab/$(NAME)-pcb-$(VERSION).zip wpan/fab
|
2011-03-14 05:33:40 +02:00
|
|
|
|
2011-03-13 04:32:12 +02:00
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|
# --- DIY production (toner transfer) -----------------------------------------
|
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|
2011-01-08 14:45:52 +02:00
|
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|
#
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|
# Postscript for production of front/back layer, using the toner transfer
|
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|
# method. Note that other artwork transfer methods may require different
|
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|
# mirror settings.
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#
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|
# We use --ps-pads-drill-opt=none to avoid having any hole before drilling,
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|
# which yields the best results with a CNC drill. For manual drilling, "real"
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|
# would be preferrable. Do not use "small", for this created holes that are
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# larger (!) than designed.
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#
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|
2011-01-08 14:51:47 +02:00
|
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|
%-Front.ps: %.brd
|
2011-01-08 14:45:52 +02:00
|
|
|
$(PLOT_BRD) -l Front --mirror $<
|
|
|
|
|
2011-01-08 14:51:47 +02:00
|
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|
%-Back.ps: %.brd
|
2011-01-08 14:45:52 +02:00
|
|
|
$(PLOT_BRD) -l Back $<
|
|
|
|
|
2011-03-13 04:32:12 +02:00
|
|
|
# --- Cleanup -----------------------------------------------------------------
|
|
|
|
|
2011-01-08 14:45:52 +02:00
|
|
|
clean:
|
2011-01-08 14:51:47 +02:00
|
|
|
rm -f $(NAME)-Front.ps $(NAME)-Back.ps
|
2011-03-11 21:05:30 +02:00
|
|
|
rm -f $(NAME).drl $(NAME)-PCB_Edges.gbr $(NAME)-PCB_Edges.dxf
|
2011-01-18 03:40:15 +02:00
|
|
|
rm -f $(NAME)-Front.gtl $(NAME)-Mask_Front.gts
|
|
|
|
rm -f $(NAME)-SilkS_Front.gto $(NAME)-SoldP_Front.gtp
|
|
|
|
rm -f $(NAME)-Back.gbl $(NAME)-Mask_Back.gbs
|
|
|
|
rm -f $(NAME)-SilkS_Back.gbo $(NAME)-SoldP_Back.gbp
|
2011-03-15 04:31:27 +02:00
|
|
|
rm -f $(NAME)-Comments.gbr $(NAME)-Drawings.gbr
|
2011-03-15 05:01:40 +02:00
|
|
|
|
|
|
|
spotless: clean
|
|
|
|
rm -f '$$'savepcb.000 '$$'savepcb.brd
|
|
|
|
rm -f $(NAME)-cache.lib $(NAME).000 $(NAME).bak
|
|
|
|
rm -f $(NAME).net
|