prod/doc/: added scope screen shots to analysis; show crystal as alt GND for clk

prod/doc/Makefile

@@ -5,6 +5,7 @@ GENERATED=index.html setup.html flash.html test.html analysis.html \
 	  atben-A-small.png atusb-A-small.png \
 	  atben-B-small.png atusb-B-small.png \
 	  atrf-path-small.png
+ORIGINAL=atben-clkm.png atusb-clkm.png atusb-clk.png
 
 DL=http://downloads.qi-hardware.com/people/werner/wpan/tmp
 
@@ -61,7 +62,7 @@ atrf-path-small.png: \
 		  atrf-path.png
 		convert -scale 50% $< $@
 
-upload:		$(GENERATED) $(DOWNLOADS)
+upload:		$(GENERATED) $(DOWNLOADED) $(ORIGINAL)
 		rsync -e ssh $^ \
 		    www-data@downloads.qi-hardware.com:werner/wpan/prod/
 

prod/doc/analysis.hmac

@@ -24,6 +24,8 @@
 
 <SECTION ref="orientation" title="Component orientation">
 
+@@@
+
 
 <!-- ====================================================================== -->
 
@@ -42,7 +44,7 @@ On <B>atusb</B>, there is also the USB voltage domain at nominally 5.0 V.
 <P>
 Voltages should be tested in the following order: USB, then I/O, then
 digital, and finally analog. The table below gives the permissible
-ranges. Any voltages outside of these ranges indicate a problem.
+ranges. Any voltages outside these ranges indicate a problem.
 <P>
 <TABLE frame="border" cellpadding="2">
   <TR><TH>Domain<TH>Nominal<TH>Minimum<TH>Maximum
@@ -51,7 +53,6 @@ ranges. Any voltages outside of these ranges indicate a problem.
   <TR><TD>Digital<TD>1.8 V<TD>1.7 V<TD>1.9 V
   <TR><TD>Analog<TD>1.8 V<TD>1.7 V<TD>1.9 V
 </TABLE>
-<P>
 
 
 <!-- ---------------------------------------------------------------------- -->
@@ -170,9 +171,13 @@ atrf-txrx -d net:ben -C 1
 This configures <B>atben</B> as a promiscuous receiver. The reception
 of any IEEE 802.15.4 frame or pressing Ctrl-C will terminate the command.
 <P>
-The clock signal (CLKM) is available on the test pad shown here:
+The clock signal (CLKM) is available on the test pad shown on the image
+on the left, and it should look roughly as shown in the screen shot on
+the right:
 <P>
-<A href="atben-A.png"><IMG src="atben-A-small.png"></A>
+<A href="atben-A.png"><IMG src="atben-A-small.png" align="left"></A>
+&nbsp;
+<IMG src="atben-clkm.png">
 <P>
 <TABLE frame="border" cellpadding="2">
 <TR><TH align="left">Clock<TH align="left">Action
@@ -201,6 +206,14 @@ either as the direct output from the transceiver (CLKM) or after passing
 a low-pass filter (CLK):
 <P>
 <A href="atusb-A.png"><IMG src="atusb-A-small.png"></A>
+&nbsp;
+<IMG src="atusb-clkm.png">
+&nbsp;
+<IMG src="atusb-clk.png">
+<P>
+The left screen shot shows the clock (CLKM) before the low-pass filter
+while the right screen shows the clock (CLK) after the the low-pass
+filter.
 <P>
 <TABLE frame="border" cellpadding="2">
 <TR><TH align="left">Clock<TH align="left">Action

prod/doc/atben.fig

@@ -30,7 +30,7 @@ Single
 2 1 0 3 4 7 55 -1 -1 0.000 0 0 -1 1 0 2
 	5 1 3.00 60.00 120.00
 	 1800 3735 2835 3735
-# B
+# AB
 2 1 0 3 0 7 55 -1 -1 0.000 0 0 -1 1 0 2
 	5 1 3.00 60.00 120.00
 	 9225 3825 4725 3825
@@ -38,7 +38,7 @@ Single
 2 1 0 3 4 7 55 -1 -1 0.000 0 0 -1 1 0 2
 	5 1 3.00 60.00 120.00
 	 1800 4005 2835 4005
-# B
+# AB
 2 4 0 2 0 7 56 -1 15 0.000 0 0 7 0 0 5
 	 5040 4095 4590 4095 4590 3555 5040 3555 5040 4095
 2 2 0 0 0 7 99 -1 20 0.000 0 0 -1 0 0 5
@@ -49,7 +49,7 @@ Single
 4 2 4 50 -1 18 24 0.0000 4 300 1200 1890 4725 CLKM\001
 # B
 4 1 0 55 -1 18 24 0.0000 4 300 555 5625 1935 I/O\001
-# B
+# AB
 4 0 0 55 -1 18 24 0.0000 4 300 915 9315 3960 GND\001
 # B
 4 1 0 55 -1 18 24 0.0000 4 390 1410 2880 1935 Analog\001