Werner Almesberger 86e556ce92 First part of the board bringup: power and clock. ... - atusd/ERRATA: variations of the circuit being debugged from the design - tools/Makefile, tools/try.c, tools/lib/atusd.c: user-space tool to enable the board and (in the future) establish communication - atusd/sim/clk.sch: simulation of CLK attenuation circuit with capacitative load from scope probe		2010-09-04 23:14:57 -03:00
..
cam	atusd/cam/: CAM data for cutting the PCB.	2010-09-02 23:50:45 -03:00
sim	First part of the board bringup: power and clock.	2010-09-04 23:14:57 -03:00
tools	First part of the board bringup: power and clock.	2010-09-04 23:14:57 -03:00
atusd.brd	Assorted small layout improvements.	2010-09-03 08:02:07 -03:00
atusd.cmp	atusd/: first try at a uSD-based board. Improved RF design.	2010-09-02 23:02:46 -03:00
atusd.pro	Assorted small layout improvements.	2010-09-03 08:02:07 -03:00
atusd.sch	atusd/: first try at a uSD-based board. Improved RF design.	2010-09-02 23:02:46 -03:00
dtc123.lib	Added components (transistor and balun) for the uSD variant.	2010-09-02 18:15:28 -03:00
dtc123je.fpd	Added components (transistor and balun) for the uSD variant.	2010-09-02 18:15:28 -03:00
ERRATA	First part of the board bringup: power and clock.	2010-09-04 23:14:57 -03:00
Makefile	Added components (transistor and balun) for the uSD variant.	2010-09-02 18:15:28 -03:00