1
0
mirror of git://projects.qi-hardware.com/eda-tools.git synced 2024-11-26 20:24:58 +02:00

sch2fig/: implement fig_wire and fig_bus as dwg_* using fig_poly

This commit is contained in:
Werner Almesberger 2016-07-30 21:21:45 -03:00
parent 402e14d78f
commit 3ca2130db5
5 changed files with 36 additions and 28 deletions

View File

@ -24,6 +24,9 @@
#include "dwg.h" #include "dwg.h"
/* ----- Labels ------------------------------------------------------------ */
enum box_type { // ___ enum box_type { // ___
box_simple, // [___] box_simple, // [___]
box_left, // <___] box_left, // <___]
@ -362,6 +365,9 @@ void dwg_hlabel(int x, int y, const char *s, int dir, int dim,
} }
/* ----- Connections ------------------------------------------------------- */
void dwg_junction(int x, int y) void dwg_junction(int x, int y)
{ {
fig_circ(x, y, JUNCTION_R, COLOR_NONE, COLOR_WIRE, LAYER_WIRES); fig_circ(x, y, JUNCTION_R, COLOR_NONE, COLOR_WIRE, LAYER_WIRES);
@ -377,3 +383,26 @@ void dwg_noconn(int x, int y)
swap(vy[0], vy[1]); swap(vy[0], vy[1]);
fig_poly(2, vx, vy, COLOR_NOCONN, COLOR_NONE, LAYER_NOCONN); fig_poly(2, vx, vy, COLOR_NOCONN, COLOR_NONE, LAYER_NOCONN);
} }
/* ----- Wires and busses -------------------------------------------------- */
void dwg_wire(int sx, int sy, int ex, int ey)
{
int vx[] = { sx, ex };
int vy[] = { sy, ey };
// WIDTH_WIRE
fig_poly(2, vx, vy, COLOR_WIRE, COLOR_NONE, LAYER_WIRES);
}
void dwg_bus(int sx, int sy, int ex, int ey)
{
int vx[] = { sx, ex };
int vy[] = { sy, ey };
// WIDTH_BUS
fig_poly(2, vx, vy, COLOR_BUS, COLOR_NONE, LAYER_BUSSES);
}

View File

@ -27,4 +27,7 @@ void dwg_glabel(int x, int y, const char *s, int dir, int dim,
void dwg_junction(int x, int y); void dwg_junction(int x, int y);
void dwg_noconn(int x, int y); void dwg_noconn(int x, int y);
void dwg_wire(int sx, int sy, int ex, int ey);
void dwg_bus(int sx, int sy, int ex, int ey);
#endif /* !DWG_H */ #endif /* !DWG_H */

View File

@ -51,28 +51,6 @@ static inline float pt(int x)
/* ----- Schematics items -------------------------------------------------- */ /* ----- Schematics items -------------------------------------------------- */
void fig_wire(int sx, int sy, int ex, int ey)
{
// TypeStyle FillCol AreaFil Cap FwdAr
// SubTy Color Pen StyleV Rad BwdAr
// Thick Depth Join Points
printf("2 1 0 %d %d 7 %d -1 -1 0.0 1 1 -1 0 0 2\n",
WIDTH_WIRE, COLOR_WIRE, LAYER_WIRES);
printf("\t%d %d %d %d\n", cx(sx), cy(sy), cx(ex), cy(ey));
}
void fig_bus(int sx, int sy, int ex, int ey)
{
// TypeStyle FillCol AreaFil Cap FwdAr
// SubTy Color Pen StyleV Rad BwdAr
// Thick Depth Join Points
printf("2 1 0 %d %d 7 %d -1 -1 0.0 1 1 -1 0 0 2\n",
WIDTH_BUS, COLOR_BUS, LAYER_BUSSES);
printf("\t%d %d %d %d\n", cx(sx), cy(sy), cx(ex), cy(ey));
}
void fig_line(int sx, int sy, int ex, int ey) void fig_line(int sx, int sy, int ex, int ey)
{ {
// TypeStyle FillCol AreaFil Cap FwdAr // TypeStyle FillCol AreaFil Cap FwdAr

View File

@ -28,8 +28,6 @@ enum fig_shape {
/* schematics */ /* schematics */
void fig_wire(int sx, int sy, int ex, int ey);
void fig_bus(int sx, int sy, int ex, int ey);
void fig_line(int sx, int sy, int ex, int ey); void fig_line(int sx, int sy, int ex, int ey);
/* general */ /* general */

View File

@ -469,12 +469,12 @@ bool sch_parse(struct sch_ctx *ctx, const char *line)
if (sscanf(line, "Wire Wire Line%n", &n) == 0 && n) { if (sscanf(line, "Wire Wire Line%n", &n) == 0 && n) {
ctx->state = sch_wire; ctx->state = sch_wire;
ctx->wire = fig_wire; ctx->wire = dwg_wire;
return 1; return 1;
} }
if (sscanf(line, "Wire Bus Line%n", &n) == 0 && n) { if (sscanf(line, "Wire Bus Line%n", &n) == 0 && n) {
ctx->state = sch_wire; ctx->state = sch_wire;
ctx->wire = fig_bus; ctx->wire = dwg_bus;
return 1; return 1;
} }
if (sscanf(line, "Wire Notes Line%n", &n) == 0 && n) { if (sscanf(line, "Wire Notes Line%n", &n) == 0 && n) {
@ -497,12 +497,12 @@ bool sch_parse(struct sch_ctx *ctx, const char *line)
*/ */
if (sscanf(line, "Entry Wire Line%n", &n) == 0 && n) { if (sscanf(line, "Entry Wire Line%n", &n) == 0 && n) {
ctx->state = sch_wire; ctx->state = sch_wire;
ctx->wire = fig_wire; ctx->wire = dwg_wire;
return 1; return 1;
} }
if (sscanf(line, "Entry Bus Bus%n", &n) == 0 && n) { if (sscanf(line, "Entry Bus Bus%n", &n) == 0 && n) {
ctx->state = sch_wire; ctx->state = sch_wire;
ctx->wire = fig_bus; ctx->wire = dwg_bus;
return 1; return 1;
} }