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git://projects.qi-hardware.com/kicad-libs.git
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Merge branch 'master' of projects.qi-hardware.com:kicad-libs
This commit is contained in:
Adam Wang
commit
354d60f2b1
1
AUTHORS
1
AUTHORS
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@ -42,6 +42,7 @@ Werner Almesberger <werner@almesberger.net>
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components/74x1g07_5.lib
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components/74x1g07_4.lib
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components/74x1g07_6.lib
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components/adxl32x.lib
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components/atmega8u2.lib
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components/c8051f320.lib
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components/c8051f326.lib
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@ -27,6 +27,87 @@ Codec
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Audio
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wm9707scft/v
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Connector
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Generated
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conn_1
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conn_2
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conn_3
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conn_4
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conn_5
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conn_6
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conn_7
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conn_8
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conn_9
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conn_10
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conn_11
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conn_12
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conn_13
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conn_14
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conn_15
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conn_16
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conn_17
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conn_18
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conn_19
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conn_20
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conn_21
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conn_22
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conn_23
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conn_24
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conn_25
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conn_26
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conn_27
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conn_28
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conn_29
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conn_30
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conn_31
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conn_32
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conn_33
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conn_34
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conn_35
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conn_36
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conn_37
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conn_38
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conn_39
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conn_40
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conn_1x2
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conn_2x2
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conn_3x2
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conn_4x2
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conn_5x2
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conn_6x2
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conn_7x2
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conn_8x2
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conn_9x2
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conn_10x2
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conn_11x2
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conn_12x2
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conn_13x2
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conn_14x2
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conn_15x2
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conn_16x2
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conn_17x2
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conn_18x2
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conn_19x2
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conn_20x2
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conn_21x2
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conn_22x2
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conn_23x2
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conn_24x2
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conn_25x2
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conn_26x2
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conn_27x2
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conn_28x2
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conn_29x2
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conn_30x2
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conn_31x2
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conn_32x2
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conn_33x2
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conn_34x2
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conn_35x2
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conn_36x2
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conn_37x2
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conn_38x2
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conn_39x2
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conn_40x2
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Generic
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TESTPOINT
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conn_2
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@ -58,6 +139,9 @@ Electromechanical
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SW_PUSH
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Case
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MH
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Sensor
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Acceleration
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ADXL32X
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FPGA
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Xilinx
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xc6slx45-2fgg484c
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@ -4,6 +4,8 @@
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# Note that we don't have the concept of a "library of everything" so far.
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#
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GEN = gencon.lib
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.PHONY: all sch catalog view upload missing clean spotless
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all: sch
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@ -11,13 +13,13 @@ all: sch
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# @echo "make what ? targets: sch loe"
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# @exit 1
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sch:
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sch: $(GEN)
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eeschema `pwd`/components.sch
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DESCR-dcm: *.dcm
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../scripts/dcm2desc -L . >$@ || { rm -f $@; exit 1; }
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catalog catalog.pdf: EXPAND DESCR-dcm *.lib
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catalog catalog.pdf: EXPAND DESCR-dcm *.lib $(GEN)
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genex -p -L . EXPAND DESCR-dcm >catalog.pdf || \
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{ rm -f catalog.pdf; exit 1; }
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@ -27,9 +29,12 @@ view: catalog.pdf
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upload: catalog.pdf
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qippl catalog.pdf tmp/kicad-libs-components.pdf
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missing:
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missing: $(GEN)
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../scripts/missing-in-tree -L . EXPAND
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%.lib: %.pl
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./$< >$@ || { rm -f $@; exit 1; }
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#loe:
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# ./mkloe
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@ -37,4 +42,4 @@ clean:
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rm -f DESCR-dcm
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spotless: clean
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rm -f catalog.pdf
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rm -f catalog.pdf $(GEN)
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30
components/adxl32x.lib
Normal file
30
components/adxl32x.lib
Normal file
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@ -0,0 +1,30 @@
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EESchema-LIBRARY Version 2.3 Date: Sun Jun 10 11:27:51 2012
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#encoding utf-8
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#
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# ADXL32X
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#
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DEF ADXL32X U 0 40 Y Y 1 F N
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F0 "U" -400 500 60 H V C CNN
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F1 "ADXL32X" 0 0 60 H V C CNN
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DRAW
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X Vs 14 50 750 300 D 50 50 1 0 W
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X Vs 15 -50 750 300 D 50 50 1 0 W
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X NC 16 -150 750 300 D 50 50 1 0 N
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S 450 -450 -450 450 0 1 0 N
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X NC 1 -750 150 300 R 50 50 1 1 N
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X ST 2 -750 50 300 R 50 50 1 1 I
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X COM 3 -750 -50 300 R 50 50 1 1 W
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X NC 4 -750 -150 300 R 50 50 1 1 N
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X COM 5 -150 -750 300 U 50 50 1 1 W
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X COM 6 -50 -750 300 U 50 50 1 1 W
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X COM 7 50 -750 300 U 50 50 1 1 W
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X NC 8 150 -750 300 U 50 50 1 1 N
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X NC 9 750 -150 300 L 50 50 1 1 N
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X Yout 10 750 -50 300 L 50 50 1 1 O
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X NC 11 750 50 300 L 50 50 1 1 N
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X Xout 12 750 150 300 L 50 50 1 1 O
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X NC 13 150 750 300 D 50 50 1 1 N
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ENDDRAW
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ENDDEF
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#
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#End Library
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@ -137,3 +137,4 @@ LibName65=./con
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LibName66=./hole
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LibName67=./diode
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LibName68=./powered
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LibName69=./gencon
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39
components/gencon.pl
Executable file
39
components/gencon.pl
Executable file
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@ -0,0 +1,39 @@
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#!/usr/bin/perl
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#
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# gencon.pl - Generate generic connectors
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#
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# Copyright 2012 by Werner Almesberger
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 2 of the License, or
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# (at your option) any later version.
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#
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print "EESchema-LIBRARY Version 2.3 Date: `date`\n";
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print "#encoding utf-8\n";
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for ($x = 1; $x <= 40; $x++) {
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for ($y = 1; $y <= 2; $y++) {
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$name = "CONN_$x";
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$name .= "X$y" if $y > 1;
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print "#\n# $name\n#\n";
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print "DEF $name CON 0 40 Y N 1 F N\n";
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$h = $x/2*100;
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print "F0 \"CON\" 0 ".($h+50)." 60 H V C CNN\n";
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print "F1 \"$name\" 0 ".(-$h-50)." 60 H V C CNN\n";
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print "DRAW\n";
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print "S -100 -$h 100 $h 0 1 0 N\n";
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$n = 1;
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for ($px = 1; $px <= $x; $px++) {
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for ($py = 1; $py <= $y; $py++) {
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print "X $n $n ".(400*($py-1.5)*2)." ".
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($h-$px*100+50)." 300 ".
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("?", "R", "L")[$py]." 50 50 1 1 P\n";
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$n++;
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}
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}
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print "ENDDRAW\n";
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print "ENDDEF\n";
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}
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}
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print "#\n#End Library\n";
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@ -111,6 +111,9 @@ F: mini_usb_b
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# Solder pads and test points
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F: pads
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# "pads" in typical array formations
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F: pads-array
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# "Generic" simple QFN
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F: qfn
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#
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@ -1,4 +1,5 @@
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MODULES=8_10-card fiducial mini-usb pads qfn qfp sot sot-323 ssop stdpass \
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MODULES=8_10-card bat-clip-aa-th \
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fiducial mini-usb pads pads-array qfn qfp sot sot-323 ssop stdpass \
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usb-a-pcb usb_a_plug_smt
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.SUFFIXES: .fpd .mod
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31
modules/pads-array.fpd
Normal file
31
modules/pads-array.fpd
Normal file
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@ -0,0 +1,31 @@
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/* MACHINE-GENERATED ! */
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frame pad {
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__0: vec @(x/2, y/2)
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__1: vec @(-x/2, -y/2)
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rpad "$n" . __0 bare
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}
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package "PAD_${name}_${N}x$e"
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unit mm
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table
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{ name, x, y }
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{ "2mm", 2mm, 0.5mm }
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{ "60x60", 60mil, 60mil }
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{ "80x80", 80mil, 80mil }
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{ "120x60", 120mil, 60mil }
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table
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{ ?name, e, Nmax }
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{ "2mm", 50mil, 20 }
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{ "60x60", 0mm, 1 }
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{ "80x80", 0mm, 1 }
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{ "120x60", 0mm, 1 }
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loop N = 2, Nmax
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loop n = 1, N
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__0: vec @(0mm, e*(n-1))
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frame pad .
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@ -103,6 +103,7 @@ unit auto
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table
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{ pins, variant, X1, Y1, X2, Y2, E, C1, C2, SE, SNX, SNY, SX, SY }
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{ 16, "LFCSP_LQ", 0.35mm, 1.2mm, 2.43mm, 2.43mm, 0.65mm, 4.1mm, 4.1mm, 1mm, 2, 2, 0.7mm, 0.7mm }
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{ 28, "Atmel", 0.24mm, 0.7mm, 2.4mm, 2.4mm, 0.45mm, 4.1mm, 4.1mm, 1mm, 2, 2, 0.8mm, 0.8mm }
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{ 28, "MCHP-ML", 0.37mm, 1mm, 4.25mm, 4.25mm, 0.65mm, 5.7mm, 5.7mm, 1mm, 3, 3, 0.65mm, 0.65mm }
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{ 28, "SiLabs", 0.25mm, 0.9mm, 3.3mm, 3.3mm, 0.5mm, 4.8mm, 4.8mm, 1.1mm, 3, 3, 0.9mm, 0.9mm }
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