mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-23 22:34:04 +02:00
[uboot-xburst] cleanup the lcm init
- cleanup code style - remove useless code - make the color correct in u-boot Signed-off-by: Xiangfu Liu <xiangfu@sharism.cc>
This commit is contained in:
Xiangfu Liu
parent
51502be452
commit
3b8d5515c1
@ -193,7 +193,6 @@ static inline void jz_flush_icache(void)
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#define RTC_HWRSR_PIN (1 << 1) /* Wakeup pin status bit */
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#define RTC_HWRSR_ALM (1 << 0) /* RTC alarm status bit */
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/*************************************************************************
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* CPM (Clock reset and Power control Management)
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*************************************************************************/
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@ -1,7 +1,7 @@
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/*
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* JzRISC lcd controller
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*
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* xiangfu liu <xiangfu.z@gmail.com>
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* Xiangfu Liu <xiangfu@sharism.cc>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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@ -56,7 +56,6 @@ vidinfo_t panel_info = {
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};
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int lcd_line_length;
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int lcd_color_fg;
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int lcd_color_bg;
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/*
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@ -74,8 +73,8 @@ void lcd_disable (void);
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static int jz_lcd_init_mem(void *lcdbase, vidinfo_t *vid);
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static void jz_lcd_desc_init(vidinfo_t *vid);
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static int jz_lcd_hw_init( vidinfo_t *vid );
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extern int flush_cache_all(void);
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static int jz_lcd_hw_init(vidinfo_t *vid);
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extern int flush_cache_all(void);
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void lcd_ctrl_init (void *lcdbase)
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{
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@ -91,7 +90,6 @@ void lcd_ctrl_init (void *lcdbase)
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/*
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* Before enabled lcd controller, lcd registers should be configured correctly.
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*/
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void lcd_enable (void)
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{
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REG_LCD_CTRL &= ~(1<<4); /* LCDCTRL.DIS */
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@ -1,7 +1,7 @@
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/*
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* JzRISC lcd controller
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*
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* xiangfu liu <xiangfu.z@gmail.com>
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* Xiangfu Liu <xiangfu@sharism.cc>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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@ -86,126 +86,56 @@ struct lcd_desc{
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/*
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* LCD panel specific definition
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*/
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#define MODE 0xc9 /* 8bit serial RGB */
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#define SPEN (32*2+21) /*LCD_SPL */
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#define SPCK (32*2+23) /*LCD_CLS */
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#define SPDA (32*2+22) /*LCD_D12 */
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#define LCD_RET (32*3+27)
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#define MODE (0xc9) /* 8bit serial RGB */
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#define __spi_write_reg1(reg, val) \
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do { \
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unsigned char no;\
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unsigned short value;\
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unsigned char a=0;\
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unsigned char b=0;\
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a=reg;\
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b=val;\
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__gpio_set_pin(SPEN);\
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__gpio_set_pin(SPCK);\
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__gpio_clear_pin(SPDA);\
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__gpio_clear_pin(SPEN);\
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udelay(25);\
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value=((a<<8)|(b&0xFF));\
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for(no=0;no<16;no++)\
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{\
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__gpio_clear_pin(SPCK);\
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if((value&0x8000)==0x8000)\
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__gpio_set_pin(SPDA);\
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else\
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__gpio_clear_pin(SPDA);\
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udelay(25);\
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__gpio_set_pin(SPCK);\
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value=(value<<1); \
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udelay(25);\
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}\
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__gpio_set_pin(SPEN);\
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udelay(100);\
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#define __spi_write_reg1(reg, val) \
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do { \
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unsigned char no; \
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unsigned short value; \
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unsigned char a=reg; \
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unsigned char b=val; \
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__gpio_set_pin(SPEN); \
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__gpio_set_pin(SPCK); \
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__gpio_clear_pin(SPDA); \
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__gpio_clear_pin(SPEN); \
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udelay(25); \
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value=((a<<8)|(b&0xFF)); \
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for(no=0;no<16;no++) \
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{ \
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__gpio_clear_pin(SPCK); \
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if((value&0x8000)==0x8000) \
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__gpio_set_pin(SPDA); \
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else \
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__gpio_clear_pin(SPDA); \
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udelay(25); \
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__gpio_set_pin(SPCK); \
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value=(value<<1); \
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udelay(25); \
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} \
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__gpio_set_pin(SPEN); \
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udelay(100); \
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} while (0)
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#define __spi_write_reg(reg, val) \
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do {\
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__spi_write_reg1((reg<<2|2), val);\
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udelay(100); \
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}while(0)
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#define __lcd_special_pin_init() \
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do { \
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__gpio_as_output(SPEN); /* use SPDA */\
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__gpio_as_output(SPCK); /* use SPCK */\
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__gpio_as_output(SPDA); /* use SPDA */\
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__gpio_as_output(LCD_RET);\
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#define __lcd_display_pin_init() \
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do { \
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__cpm_start_tcu(); \
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__gpio_as_output(SPEN); /* use SPDA */ \
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__gpio_as_output(SPCK); /* use SPCK */ \
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__gpio_as_output(SPDA); /* use SPDA */ \
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} while (0)
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#define __lcd_special_on() \
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do { \
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__spi_write_reg1(0x05, 0x1e); \
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udelay(50);\
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__spi_write_reg1(0x05, 0x5d); \
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__spi_write_reg1(0x0B, 0x81); \
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__spi_write_reg1(0x01, 0x95); \
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__spi_write_reg1(0x00, 0x07); \
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__spi_write_reg1(0x06, 0x15); \
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__spi_write_reg1(0x07, 0x8d); \
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__spi_write_reg1(0x04, 0x0f); \
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__spi_write_reg1(0x0d, 0x3d); \
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__spi_write_reg1(0x10, 0x42); \
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__spi_write_reg1(0x11, 0x3a); \
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__spi_write_reg1(0x05, 0x5f); \
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#define __lcd_display_on() \
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do { \
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__spi_write_reg1(0x05, 0x1e); \
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__spi_write_reg1(0x05, 0xc6); \
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__spi_write_reg1(0x07, 0x8d); \
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__spi_write_reg1(0x13, 0x01); \
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__spi_write_reg1(0x05, 0xc7); \
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} while (0)
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#define __lcd_special_off() \
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do { \
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__spi_write_reg1(0x05, 0x5e); \
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#define __lcd_display_off() \
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do { \
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__spi_write_reg1(0x05, 0x5e); \
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} while (0)
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#define __lcd_set_backlight_level(n)\
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do { \
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__gpio_as_output(LCD_RET); \
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__gpio_set_pin(LCD_RET); \
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} while (0)
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#if defined(CONFIG_SAKC)
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#define __lcd_close_backlight() \
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do { \
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__gpio_as_output(GPIO_PWM); \
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__gpio_clear_pin(GPIO_PWM); \
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} while (0)
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#endif
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#if defined(CONFIG_SAKC)
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#define __lcd_display_pin_init() \
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do { \
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__cpm_start_tcu(); \
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__lcd_special_pin_init(); \
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} while (0)
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#define __lcd_display_on() \
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do { \
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__lcd_special_on(); \
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} while (0)
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#define __lcd_display_off() \
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do { \
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__lcd_special_off(); \
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} while (0)
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#else
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#define __lcd_display_pin_init() \
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do { \
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__cpm_start_tcu(); \
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__lcd_special_pin_init(); \
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} while (0)
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#define __lcd_display_on() \
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do { \
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__gpio_set_pin(GPIO_DISP_OFF_N); \
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__lcd_special_on(); \
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} while (0)
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#define __lcd_display_off() \
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do { \
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__lcd_special_off(); \
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__gpio_clear_pin(GPIO_DISP_OFF_N); \
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} while (0)
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#endif
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#endif /* __QI_LB60_GPM940B0_H__ */
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@ -178,16 +178,13 @@
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* GPIO definition
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*/
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#define GPIO_LCD_CS (2 * 32 + 21)
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#define GPIO_DISP_OFF_N (3 * 32 + 21)
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#define GPIO_PWM (3 * 32 + 27)
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#define GPIO_AMP_EN (3 * 32 + 4)
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#define GPIO_SDPW_EN (3 * 32 + 2)
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#define GPIO_SD_DETECT (3 * 32 + 0)
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#define GPIO_USB_DETECT (3 * 32 + 27)
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#define GPIO_BUZZ_PWM (3 * 32 + 28)
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#define GPIO_BUZZ_PWM (3 * 32 + 27)
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#define GPIO_USB_DETECT (3 * 32 + 28)
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#define GPIO_AUDIO_POP (1 * 32 + 29)
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#define GPIO_COB_TEST (1 * 32 + 30)
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@ -199,4 +196,7 @@
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#define GPIO_SD_CD_N GPIO_SD_DETECT /* SD Card insert detect */
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#define GPIO_SD_VCC_EN_N GPIO_SDPW_EN /* SD Card Power Enable */
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#define SPEN GPIO_LCD_CS /* LCDCS :Serial command enable */
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#define SPDA (2 * 32 + 22) /* LCDSCL:Serial command clock input */
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#define SPCK (2 * 32 + 23) /* LCDSDA:Serial command data input */
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#endif /* __CONFIG_NANONOTE_H */
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