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ppc40x: add more EBC_BXCR defines
Cc: backfire@openwrt.org git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20930 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -0,0 +1,27 @@
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--- a/arch/powerpc/boot/dcr.h
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+++ b/arch/powerpc/boot/dcr.h
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@@ -49,6 +49,14 @@ static const unsigned long sdram_bxcr[]
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#define EBC_BXCR(n) (n)
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#define EBC_BXCR_BAS 0xfff00000
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#define EBC_BXCR_BS 0x000e0000
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+#define EBC_BXCR_BS_1M 0x00000000
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+#define EBC_BXCR_BS_2M 0x00020000
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+#define EBC_BXCR_BS_4M 0x00040000
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+#define EBC_BXCR_BS_8M 0x00060000
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+#define EBC_BXCR_BS_16M 0x00080000
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+#define EBC_BXCR_BS_32M 0x000a0000
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+#define EBC_BXCR_BS_64M 0x000c0000
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+#define EBC_BXCR_BS_128M 0x000e0000
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#define EBC_BXCR_BANK_SIZE(reg) \
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(0x100000 << (((reg) & EBC_BXCR_BS) >> 17))
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#define EBC_BXCR_BU 0x00018000
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@@ -57,6 +65,9 @@ static const unsigned long sdram_bxcr[]
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#define EBC_BXCR_BU_WO 0x00010000
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#define EBC_BXCR_BU_RW 0x00018000
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#define EBC_BXCR_BW 0x00006000
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+#define EBC_BXCR_BW_8 0x00000000
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+#define EBC_BXCR_BW_16 0x00002000
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+#define EBC_BXCR_BW_32 0x00006000
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#define EBC_B0AP 0x10
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#define EBC_B1AP 0x11
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#define EBC_B2AP 0x12
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@ -1,12 +0,0 @@
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--- a/arch/powerpc/boot/dcr.h
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+++ b/arch/powerpc/boot/dcr.h
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@@ -57,6 +57,9 @@ static const unsigned long sdram_bxcr[]
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#define EBC_BXCR_BU_WO 0x00010000
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#define EBC_BXCR_BU_RW 0x00018000
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#define EBC_BXCR_BW 0x00006000
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+#define EBC_BXCR_BW_8 0x00000000
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+#define EBC_BXCR_BW_16 0x00002000
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+#define EBC_BXCR_BW_32 0x00006000
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#define EBC_B0AP 0x10
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#define EBC_B1AP 0x11
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#define EBC_B2AP 0x12
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@ -1,6 +1,6 @@
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--- /dev/null
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+++ b/arch/powerpc/boot/cuboot-magicbox.c
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@@ -0,0 +1,96 @@
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@@ -0,0 +1,98 @@
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+/*
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+ * Old U-boot compatibility for Magicbox boards
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+ *
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@ -44,13 +44,15 @@
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+
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+ /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
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+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
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+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
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+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BS_1M |
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+ EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
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+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
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+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
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+
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+ /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
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+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
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+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
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+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BS_1M |
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+ EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
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+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
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+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
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+
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@ -1,6 +1,6 @@
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--- /dev/null
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+++ b/arch/powerpc/boot/cuboot-openrb.c
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@@ -0,0 +1,77 @@
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@@ -0,0 +1,79 @@
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+/*
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+ * Old U-boot compatibility for OpenRB boards
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+ *
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@ -44,13 +44,15 @@
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+
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+ /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
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+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
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+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
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+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BS_1M |
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+ EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
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+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
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+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
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+
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+ /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
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+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
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+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
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+ mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BS_1M |
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+ EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
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+ mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
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+ mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
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+
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