mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-23 22:24:39 +02:00
[uboot-xburst] move lcd init more early
Signed-off-by: Xiangfu Liu <xiangfu@sharism.cc>
This commit is contained in:
Xiangfu Liu
parent
6883819719
commit
a510aa32ac
@ -78,13 +78,9 @@ extern int flush_cache_all(void);
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void lcd_ctrl_init (void *lcdbase)
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{
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__lcd_display_pin_init();
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jz_lcd_init_mem(lcdbase, &panel_info);
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jz_lcd_desc_init(&panel_info);
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jz_lcd_hw_init(&panel_info);
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__lcd_display_on() ;
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}
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/*
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@ -22,8 +22,6 @@
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#ifndef __QI_LB60_GPM940B0_H__
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#define __QI_LB60_GPM940B0_H__
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#include <asm/io.h>
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struct lcd_desc{
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unsigned int next_desc; /* LCDDAx */
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unsigned int databuf; /* LCDSAx */
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@ -98,7 +96,6 @@ do { \
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__gpio_set_pin(SPCK); \
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__gpio_clear_pin(SPDA); \
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__gpio_clear_pin(SPEN); \
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udelay(25); \
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value=((a<<8)|(b&0xFF)); \
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for(no=0;no<16;no++) \
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{ \
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@ -107,13 +104,10 @@ do { \
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__gpio_set_pin(SPDA); \
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else \
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__gpio_clear_pin(SPDA); \
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udelay(25); \
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__gpio_set_pin(SPCK); \
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value=(value<<1); \
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udelay(25); \
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} \
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__gpio_set_pin(SPEN); \
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udelay(100); \
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} while (0)
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#define __lcd_display_pin_init() \
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@ -127,10 +121,10 @@ do { \
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#define __lcd_display_on() \
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do { \
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__spi_write_reg1(0x05, 0x1e); \
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__spi_write_reg1(0x05, 0xc6); \
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__spi_write_reg1(0x05, 0x5e); \
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__spi_write_reg1(0x07, 0x8d); \
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__spi_write_reg1(0x13, 0x01); \
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__spi_write_reg1(0x05, 0xc7); \
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__spi_write_reg1(0x05, 0x5f); \
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} while (0)
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#define __lcd_display_off() \
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@ -61,8 +61,6 @@ $(nandobj)u-boot-spl: $(OBJS)
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-o $(nandobj)u-boot-spl
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# create symbolic links for common files
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# from cpu directory
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$(obj)start.S:
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@rm -f $(obj)start.S
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ln -s $(SRCTREE)/arch/mips/cpu/xburst/start_spl.S $(obj)start.S
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@ -83,12 +81,10 @@ $(obj)jz_serial.c:
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@rm -f $(obj)jz_serial.c
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ln -s $(SRCTREE)/arch/mips/cpu/xburst/jz_serial.c $(obj)jz_serial.c
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# from nand_spl directory
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$(obj)nand_boot_jz4740.c:
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@rm -f $(obj)nand_boot_jz4740.c
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ln -s $(SRCTREE)/nand_spl/nand_boot_jz4740.c $(obj)nand_boot_jz4740.c
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#########################################################################
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ln -s $(SRCTREE)/drivers/video/nanonote_gpm940b0.h $(obj)nanonote_gpm940b0.h
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$(obj)%.o: $(obj)%.S
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$(CC) $(AFLAGS) -c -o $@ $<
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@ -96,9 +92,6 @@ $(obj)%.o: $(obj)%.S
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$(obj)%.o: $(obj)%.c
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$(CC) $(CFLAGS) -c -o $@ $<
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -21,8 +21,8 @@
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#include <common.h>
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#include <nand.h>
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#include <asm/io.h>
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#include <asm/jz4740.h>
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#include "nanonote_gpm940b0.h"
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#define KEY_U_OUT (32 * 2 + 16)
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#define KEY_U_IN (32 * 3 + 19)
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@ -30,15 +30,10 @@
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/*
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* NAND flash definitions
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*/
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#define NAND_DATAPORT 0xb8000000
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#define NAND_ADDRPORT 0xb8010000
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#define NAND_COMMPORT 0xb8008000
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#define ECC_BLOCK 512
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#define ECC_POS 6
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#define PAR_SIZE 9
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#define __nand_enable() (REG_EMC_NFCSR |= EMC_NFCSR_NFE1 | EMC_NFCSR_NFCE1)
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#define __nand_disable() (REG_EMC_NFCSR &= ~(EMC_NFCSR_NFCE1))
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#define __nand_ecc_rs_encoding() \
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@ -48,14 +43,6 @@
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#define __nand_ecc_disable() (REG_EMC_NFECR &= ~EMC_NFECR_ECCE)
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#define __nand_ecc_encode_sync() while (!(REG_EMC_NFINTS & EMC_NFINTS_ENCF))
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#define __nand_ecc_decode_sync() while (!(REG_EMC_NFINTS & EMC_NFINTS_DECF))
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static inline void __nand_dev_ready(void)
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{
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unsigned int timeout = 10000;
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while ((REG_GPIO_PXPIN(2) & 0x40000000) && timeout--);
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while (!(REG_GPIO_PXPIN(2) & 0x40000000));
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}
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#define __nand_cmd(n) (REG8(NAND_COMMPORT) = (n))
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#define __nand_addr(n) (REG8(NAND_ADDRPORT) = (n))
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#define __nand_data8() REG8(NAND_DATAPORT)
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@ -75,6 +62,13 @@ static inline void __nand_dev_ready(void)
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#define NAND_ROW_CYCLE 2
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#endif
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static inline void __nand_dev_ready(void)
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{
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unsigned int timeout = 10000;
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while ((REG_GPIO_PXPIN(2) & 0x40000000) && timeout--);
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while (!(REG_GPIO_PXPIN(2) & 0x40000000));
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}
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/*
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* NAND flash parameters
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*/
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@ -84,7 +78,6 @@ static int ecc_count = 4;
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static int page_per_block = 64;
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static int bad_block_pos = 0;
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static int block_size = 131072;
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static unsigned char oob_buf[128] = {0};
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/*
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@ -198,7 +191,6 @@ static int nand_read_page(int page_addr, uchar *dst, uchar *oobbuf)
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/*
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* Read page data
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*/
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/* Send READ0 command */
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__nand_cmd(NAND_CMD_READ0);
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@ -233,16 +225,11 @@ static int nand_read_page(int page_addr, uchar *dst, uchar *oobbuf)
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__nand_ecc_rs_decoding();
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/* Read data */
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nand_read_buf((void *)tmpbuf, ECC_BLOCK);
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nand_read_buf((void *)tmpbuf, CONFIG_SYS_NAND_ECCSIZE);
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/* Set PAR values */
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for (j = 0; j < PAR_SIZE; j++) {
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#if defined(CONFIG_SYS_NAND_ECC_POS)
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*paraddr++ = oobbuf[CONFIG_SYS_NAND_ECC_POS + i*PAR_SIZE + j];
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#else
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*paraddr++ = oobbuf[ECC_POS + i*PAR_SIZE + j];
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#endif
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}
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for (j = 0; j < CONFIG_SYS_NAND_ECCBYTES; j++)
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*paraddr++ = oobbuf[CONFIG_SYS_NAND_ECC_POS + i*CONFIG_SYS_NAND_ECCBYTES + j];
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/* Set PRDY */
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REG_EMC_NFECR |= EMC_NFECR_PRDY;
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@ -257,12 +244,11 @@ static int nand_read_page(int page_addr, uchar *dst, uchar *oobbuf)
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stat = REG_EMC_NFINTS;
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if (stat & EMC_NFINTS_ERR) {
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/* Error occurred */
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/* serial_puts("\n Error occurred\n"); */
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/* serial_puts("Error occurred\n"); */
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if (stat & EMC_NFINTS_UNCOR) {
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/* Uncorrectable error occurred */
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/* serial_puts("\nUncorrectable error occurred\n"); */
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}
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else {
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/* serial_puts("Uncorrectable error occurred\n"); */
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} else {
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unsigned int errcnt, index, mask;
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errcnt = (stat & EMC_NFINTS_ERRCNT_MASK) >> EMC_NFINTS_ERRCNT_BIT;
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@ -292,8 +278,7 @@ static int nand_read_page(int page_addr, uchar *dst, uchar *oobbuf)
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}
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}
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}
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tmpbuf += ECC_BLOCK;
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tmpbuf += CONFIG_SYS_NAND_ECCSIZE;
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}
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return 0;
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@ -342,13 +327,12 @@ static void gpio_init(void)
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/*
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* Initialize SDRAM pins
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*/
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__gpio_as_sdram_32bit();
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__gpio_as_sdram_16bit_4720();
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/*
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* Initialize UART0 pins
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*/
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__gpio_as_uart0();
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__gpio_jtag_to_uart0();
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}
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@ -375,6 +359,9 @@ void nand_boot(void)
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gpio_init();
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pll_init();
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__lcd_display_pin_init();
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__lcd_display_on() ;
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serial_init();
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sdram_init();
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jz_nand_init();
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@ -392,7 +379,7 @@ void nand_boot(void)
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page_per_block = CONFIG_SYS_NAND_BLOCK_SIZE / CONFIG_SYS_NAND_PAGE_SIZE;
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bad_block_pos = (page_size == 512) ? 5 : 0;
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oob_size = page_size / 32;
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ecc_count = page_size / ECC_BLOCK;
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ecc_count = page_size / CONFIG_SYS_NAND_ECCSIZE;
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/*
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* Load U-Boot image from NAND into RAM
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