sie-ceimtun/Examples/Beta1/logic/build/_xmsgs/bitgen.xmsgs

<?xml version="1.0" encoding="UTF-8"?>
<!-- IMPORTANT: This is an internal file that has been generated
     by the Xilinx ISE software.  Any direct editing or
     changes made to this file may result in unpredictable
     behavior or data corruption.  It is strongly advised that
     users do not edit the contents of this file. -->
<messages>
<msg type="info" file="Bitgen" num="275" delta="old" >Spartan-3E devices do not support bitstream readback of the Blockram resources in the -4C speedgrade.  If Blockram readback functionality is desired, it is suggested to target the -5C or -4I speedgrades.
</msg>

</messages>
Uploaded the first Beta to test in the development group 2010-10-31 02:34:22 +03:00			`<?xml version="1.0" encoding="UTF-8"?>`
			`<!-- IMPORTANT: This is an internal file that has been generated`
			`by the Xilinx ISE software. Any direct editing or`
			`changes made to this file may result in unpredictable`
			`behavior or data corruption. It is strongly advised that`
			`users do not edit the contents of this file. -->`
			`<messages>`
Changed src in Beta with example to all 4 PWM at 100% 2010-10-31 05:27:00 +02:00			`<msg type="info" file="Bitgen" num="275" delta="old" >Spartan-3E devices do not support bitstream readback of the Blockram resources in the -4C speedgrade. If Blockram readback functionality is desired, it is suggested to target the -5C or -4I speedgrades.`
Uploaded the first Beta to test in the development group 2010-10-31 02:34:22 +03:00			`</msg>`

			`</messages>`