qi-hardware/sie-ceimtun
1
0
Fork 0
mirror of git://projects.qi-hardware.com/sie-ceimtun.git synced 2025-01-10 15:20:14 +02:00
Code
551a96ecc3
sie-ceimtun/Examples/Beta1/logic/build/project_r_pad.csv

131 lines
6.0 KiB
Plaintext
Raw Blame History

#Release 12.2 - par M.63c (lin64)
#Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.
#Sun Oct 31 12:21:06 2010
#
## NOTE: This file is designed to be imported into a spreadsheet program
# such as Microsoft Excel for viewing, printing and sorting. The |
# character is used as the data field separator. This file is also designed
# to support parsing.
#
#INPUT FILE: project.ncd
#OUTPUT FILE: project_r_pad.csv
#PART TYPE: xc3s500e
#SPEED GRADE: -4
#PACKAGE: vq100
#
# Pinout by Pin Number:
#
# -----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,
Pin Number,Signal Name,Pin Usage,Pin Name,Direction,IO Standard,IO Bank Number,Drive (mA),Slew Rate,Termination,IOB Delay,Voltage,Constraint,IO Register,Signal Integrity,
P1,,,PROG_B,,,,,,,,,,,,
P2,addr<4>,IBUF,IO_L01P_3,INPUT,LVCMOS25*,3,,,,IFD,,LOCATED,YES,NONE,
P3,addr<5>,IBUF,IO_L01N_3,INPUT,LVCMOS25*,3,,,,IFD,,LOCATED,YES,NONE,
P4,sram_data<7>,IOB,IO_L02P_3,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,YES,NONE,
P5,sram_data<6>,IOB,IO_L02N_3/VREF_3,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,YES,NONE,
P6,,,VCCINT,,,,,,,,1.2,,,,
P7,,,GND,,,,,,,,,,,,
P8,,,VCCO_3,,,3,,,,,2.50,,,,
P9,sram_data<5>,IOB,IO_L03P_3/LHCLK0,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,YES,NONE,
P10,sram_data<4>,IOB,IO_L03N_3/LHCLK1,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,YES,NONE,
P11,sram_data<3>,IOB,IO_L04P_3/LHCLK2,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,YES,NONE,
P12,sram_data<2>,IOB,IO_L04N_3/LHCLK3/IRDY2,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,YES,NONE,
P13,,IBUF,IP,UNUSED,,3,,,,,,,,,
P14,,,GND,,,,,,,,,,,,
P15,sram_data<1>,IOB,IO_L05P_3/LHCLK4/TRDY2,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,YES,NONE,
P16,sram_data<0>,IOB,IO_L05N_3/LHCLK5,BIDIR,LVCMOS25*,3,12,SLOW,NONE**,IFD,,LOCATED,YES,NONE,
P17,,DIFFM,IO_L06P_3/LHCLK6,UNUSED,,3,,,,,,,,,
P18,,DIFFS,IO_L06N_3/LHCLK7,UNUSED,,3,,,,,,,,,
P19,,,GND,,,,,,,,,,,,
P20,,,VCCO_3,,,3,,,,,2.50,,,,
P21,,,VCCAUX,,,,,,,,2.5,,,,
P22,,DIFFM,IO_L07P_3,UNUSED,,3,,,,,,,,,
P23,,DIFFS,IO_L07N_3,UNUSED,,3,,,,,,,,,
P24,,DIFFM,IO_L01P_2/CSO_B,UNUSED,,2,,,,,,,,,
P25,,DIFFS,IO_L01N_2/INIT_B,UNUSED,,2,,,,,,,,,
P26,,DIFFM,IO_L02P_2/DOUT/BUSY,UNUSED,,2,,,,,,,,,
P27,,DIFFS,IO_L02N_2/MOSI/CSI_B,UNUSED,,2,,,,,,,,,
P28,,,VCCINT,,,,,,,,1.2,,,,
P29,,,GND,,,,,,,,,,,,
P30,reset,IBUF,IP/VREF_2,INPUT,LVCMOS25*,2,,,,NONE,,LOCATED,NO,NONE,
P31,,,VCCO_2,,,2,,,,,2.50,,,,
P32,,DIFFM,IO_L03P_2/D7/GCLK12,UNUSED,,2,,,,,,,,,
P33,quadD,IBUF,IO_L03N_2/D6/GCLK13,INPUT,LVCMOS25*,2,,,,IFD,,LOCATED,YES,NONE,
P34,quadC,IBUF,IO/D5,INPUT,LVCMOS25*,2,,,,IFD,,LOCATED,YES,NONE,
P35,quadB,IBUF,IO_L04P_2/D4/GCLK14,INPUT,LVCMOS25*,2,,,,IFD,,LOCATED,YES,NONE,
P36,quadA,IBUF,IO_L04N_2/D3/GCLK15,INPUT,LVCMOS25*,2,,,,IFD,,LOCATED,YES,NONE,
P37,,,GND,,,,,,,,,,,,
P38,clk,IBUF,IP_L05P_2/RDWR_B/GCLK0,INPUT,LVCMOS25*,2,,,,NONE,,LOCATED,NO,NONE,
P39,,DIFFSI,IP_L05N_2/M2/GCLK1,UNUSED,,2,,,,,,,,,
P40,,DIFFM,IO_L06P_2/D2/GCLK2,UNUSED,,2,,,,,,,,,
P41,,DIFFS,IO_L06N_2/D1/GCLK3,UNUSED,,2,,,,,,,,,
P42,,IOB,IO/M1,UNUSED,,2,,,,,,,,,
P43,,DIFFM,IO_L07P_2/M0,UNUSED,,2,,,,,,,,,
P44,,DIFFS,IO_L07N_2/DIN/D0,UNUSED,,2,,,,,,,,,
P45,,,VCCO_2,,,2,,,,,2.50,,,,
P46,,,VCCAUX,,,,,,,,2.5,,,,
P47,,DIFFM,IO_L08P_2/VS2,UNUSED,,2,,,,,,,,,
P48,,DIFFS,IO_L08N_2/VS1,UNUSED,,2,,,,,,,,,
P49,,DIFFM,IO_L09P_2/VS0,UNUSED,,2,,,,,,,,,
P50,,DIFFS,IO_L09N_2/CCLK,UNUSED,,2,,,,,,,,,
P51,,,DONE,,,,,,,,,,,,
P52,,,GND,,,,,,,,,,,,
P53,,DIFFM,IO_L01P_1,UNUSED,,1,,,,,,,,,
P54,,DIFFS,IO_L01N_1,UNUSED,,1,,,,,,,,,
P55,,,VCCO_1,,,1,,,,,2.50,,,,
P56,,,VCCINT,,,,,,,,1.2,,,,
P57,,DIFFM,IO_L02P_1,UNUSED,,1,,,,,,,,,
P58,,DIFFS,IO_L02N_1,UNUSED,,1,,,,,,,,,
P59,,,GND,,,,,,,,,,,,
P60,,DIFFM,IO_L03P_1/RHCLK0,UNUSED,,1,,,,,,,,,
P61,,DIFFS,IO_L03N_1/RHCLK1,UNUSED,,1,,,,,,,,,
P62,,DIFFM,IO_L04P_1/RHCLK2,UNUSED,,1,,,,,,,,,
P63,,DIFFS,IO_L04N_1/RHCLK3/TRDY1,UNUSED,,1,,,,,,,,,
P64,,,GND,,,,,,,,,,,,
P65,,DIFFM,IO_L05P_1/RHCLK4/IRDY1,UNUSED,,1,,,,,,,,,
P66,hbridge<0>,IOB,IO_L05N_1/RHCLK5,OUTPUT,LVCMOS25*,1,12,SLOW,NONE**,,,LOCATED,NO,NONE,
P67,,DIFFM,IO_L06P_1/RHCLK6,UNUSED,,1,,,,,,,,,
P68,hbridge<1>,IOB,IO_L06N_1/RHCLK7,OUTPUT,LVCMOS25*,1,12,SLOW,NONE**,,,LOCATED,NO,NONE,
P69,ncs,IBUF,IP/VREF_1,INPUT,LVCMOS25*,1,,,,IFD,,LOCATED,YES,NONE,
P70,hbridge<2>,IOB,IO_L07P_1,OUTPUT,LVCMOS25*,1,12,SLOW,NONE**,,,LOCATED,NO,NONE,
P71,hbridge<3>,IOB,IO_L07N_1,OUTPUT,LVCMOS25*,1,12,SLOW,NONE**,,,LOCATED,NO,NONE,
P72,,,GND,,,,,,,,,,,,
P73,,,VCCO_1,,,1,,,,,2.50,,,,
P74,,,VCCAUX,,,,,,,,2.5,,,,
P75,,,TMS,,,,,,,,,,,,
P76,,,TDO,,,,,,,,,,,,
P77,,,TCK,,,,,,,,,,,,
P78,addr<3>,IBUF,IO_L01P_0,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,YES,NONE,
P79,addr<2>,IBUF,IO_L01N_0,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,YES,NONE,
P80,,,VCCINT,,,,,,,,1.2,,,,
P81,,,GND,,,,,,,,,,,,
P82,,,VCCO_0,,,0,,,,,2.50,,,,
P83,addr<1>,IBUF,IO_L02P_0/GCLK4,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,YES,NONE,
P84,addr<0>,IBUF,IO_L02N_0/GCLK5,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,YES,NONE,
P85,addr<10>,IBUF,IO_L03P_0/GCLK6,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,YES,NONE,
P86,noe,IBUF,IO_L03N_0/GCLK7,INPUT,LVCMOS25*,0,,,,NONE,,LOCATED,NO,NONE,
P87,,,GND,,,,,,,,,,,,
P88,nwe,IBUF,IP_L04P_0/GCLK8,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,YES,NONE,
P89,,DIFFSI,IP_L04N_0/GCLK9,UNUSED,,0,,,,,,,,,
P90,addr<12>,IBUF,IO_L05P_0/GCLK10,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,YES,NONE,
P91,addr<11>,IBUF,IO_L05N_0/GCLK11,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,YES,NONE,
P92,addr<9>,IBUF,IO,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,YES,NONE,
P93,,,GND,,,,,,,,,,,,
P94,addr<8>,IBUF,IO_L06P_0,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,YES,NONE,
P95,addr<7>,IBUF,IO_L06N_0/VREF_0,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,YES,NONE,
P96,,,VCCAUX,,,,,,,,2.5,,,,
P97,,,VCCO_0,,,0,,,,,2.50,,,,
P98,addr<6>,IBUF,IO_L07P_0,INPUT,LVCMOS25*,0,,,,IFD,,LOCATED,YES,NONE,
P99,,DIFFS,IO_L07N_0/HSWAP,UNUSED,,0,,,,,,,,,
P100,,,TDI,,,,,,,,,,,,
# -----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,-----,
#
#* Default value.
#** This default Pullup/Pulldown value can be overridden in Bitgen.
#****** Special VCCO requirements may apply. Please consult the device
# family datasheet for specific guideline on VCCO requirements.
#
#
#
View Git Blame Copy Permalink