2009-08-25 12:53:42 +03:00
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#
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# usbboot configuration file
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#
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# Utility to respond to the Ingenic XBurst USB boot protocol, provide
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# initial boot stages and ability to access NAND on device.
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#
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# Authors: Ingenic Semiconductor, Inc.
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# Xiangfu Liu <xiangfu@qi-hardware.com>
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# Marek Lindner <lindner_marek@yahoo.de>
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# Wolfgang Spraul <wolfgang@qi-hardware.com>
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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# [PLL]
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EXTCLK = 12 #Define the external crystal in MHz
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CPUSPEED = 252 #Define the PLL output frequency
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PHMDIV = 3 #Define the frequency divider ratio of PLL=CCLK:PCLK=HCLK=MCLK
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BOUDRATE = 57600 #Define the uart boudrate
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USEUART = 0 #Use which uart, 0/1 for jz4740,0/1/2/3 for jz4750
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# [SDRAM]
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BUSWIDTH = 16 #The bus width of the SDRAM in bits (16|32)
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BANKS = 4 #The bank number (2|4)
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ROWADDR = 13 #Row address width in bits (11-13)
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COLADDR = 9 #Column address width in bits (8-12)
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ISMOBILE = 0 #Define whether SDRAM is mobile SDRAM, this only valid for Jz4750 ,1:yes 0:no
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ISBUSSHARE = 1 #Define whether SDRAM bus share with NAND 1:shared 0:unshared
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DEBUGOPS = 0
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# [NAND]
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NAND_BUSWIDTH = 8 #The width of the NAND flash chip in bits (8|16|32)
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NAND_ROWCYCLES = 3 #The row address cycles (2|3)
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2009-09-09 12:07:33 +03:00
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NAND_PAGESIZE = 2048 #The page size of the NAND chip in bytes(512|2048|4096)
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2009-08-25 12:53:42 +03:00
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NAND_PAGEPERBLOCK = 128 #The page number per block
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NAND_FORCEERASE = 1 #The force to erase flag (0|1)
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2009-09-09 12:07:33 +03:00
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NAND_OOBSIZE = 64 #oob size in byte
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NAND_ECCPOS = 6 #Specify the ECC offset inside the oob data (0-[oobsize-1])
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2009-08-25 12:53:42 +03:00
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NAND_BADBLOCKPOS = 0 #Specify the badblock flag offset inside the oob (0-[oobsize-1])
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NAND_BADBLOCKPAGE = 127 #Specify the page number of badblock flag inside a block(0-[PAGEPERBLOCK-1])
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NAND_PLANENUM = 1 #The planes number of target nand flash
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NAND_BCHBIT = 4 #Specify the hardware BCH algorithm for 4750 (4|8)
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NAND_WPPIN = 0 #Specify the write protect pin number
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NAND_BLOCKPERCHIP = 0 #Specify the block number per chip,0 means ignore
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#The program will calculate the total SDRAM size by : size = 2^(ROWADDR + COLADDR) * BANKNUM * (SDRAMWIDTH / 4)
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#The CPUSPEED has restriction as: ( CPUSPEED % EXTCLK == 0 ) && ( CPUSPEED % 12 == 0 )
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#For jz4750, the program just init BANK0(DSC0).
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#Beware all variables must be set correct!
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