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[xbboot] jz4760 evb use DDR2
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0159afd121
commit
0659b47c28
@ -10,9 +10,10 @@
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//#define CONFIG_FPGA
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//#define CONFIG_FPGA
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//#define CFG_DIV 2 /* for FPGA */
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//#define CFG_DIV 2 /* for FPGA */
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#define CONFIG_DDRC
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#define CONFIG_SDRAM_DDR2
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//#define CONFIG_SDRAM_MDDR
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//#define CONFIG_SDRAM_MDDR
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//#define CONFIG_SDRAM_DDR1
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//#define CONFIG_SDRAM_DDR1
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//#define CONFIG_SDRAM_DDR2
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//#define CONFIG_MOBILE_SDRAM
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//#define CONFIG_MOBILE_SDRAM
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#if (!defined(CONFIG_SDRAM_MDDR) && !defined(CONFIG_SDRAM_DDR1) && !defined(CONFIG_SDRAM_DDR2))
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#if (!defined(CONFIG_SDRAM_MDDR) && !defined(CONFIG_SDRAM_DDR1) && !defined(CONFIG_SDRAM_DDR2))
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@ -67,11 +67,6 @@ void c_main(void)
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serial_init_4760(1);
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serial_init_4760(1);
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pll_init_4760();
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pll_init_4760();
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sdram_init_4760();
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sdram_init_4760();
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__asm__ (
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"li $31, 0xbfc012e0 \n\t"
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"jr $31 \n\t "
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);
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break;
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break;
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default:
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default:
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return;
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return;
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@ -80,5 +75,11 @@ void c_main(void)
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serial_puts("stage 1 finished: GPIO, clocks, SDRAM, UART setup\n"
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serial_puts("stage 1 finished: GPIO, clocks, SDRAM, UART setup\n"
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"now jump back to BOOT ROM...\n");
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"now jump back to BOOT ROM...\n");
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if (ARG_CPU_ID == 0x4740) {
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__asm__ (
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"li $31, 0xbfc012e0 \n\t"
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"jr $31 \n\t "
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);
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}
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}
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}
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