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[xbboot] jz4760 evb use DDR2

This commit is contained in:
Xiangfu Liu 2010-06-10 14:13:09 +08:00
parent 0159afd121
commit 0659b47c28
2 changed files with 8 additions and 6 deletions

View File

@ -10,9 +10,10 @@
//#define CONFIG_FPGA //#define CONFIG_FPGA
//#define CFG_DIV 2 /* for FPGA */ //#define CFG_DIV 2 /* for FPGA */
#define CONFIG_DDRC
#define CONFIG_SDRAM_DDR2
//#define CONFIG_SDRAM_MDDR //#define CONFIG_SDRAM_MDDR
//#define CONFIG_SDRAM_DDR1 //#define CONFIG_SDRAM_DDR1
//#define CONFIG_SDRAM_DDR2
//#define CONFIG_MOBILE_SDRAM //#define CONFIG_MOBILE_SDRAM
#if (!defined(CONFIG_SDRAM_MDDR) && !defined(CONFIG_SDRAM_DDR1) && !defined(CONFIG_SDRAM_DDR2)) #if (!defined(CONFIG_SDRAM_MDDR) && !defined(CONFIG_SDRAM_DDR1) && !defined(CONFIG_SDRAM_DDR2))

View File

@ -67,11 +67,6 @@ void c_main(void)
serial_init_4760(1); serial_init_4760(1);
pll_init_4760(); pll_init_4760();
sdram_init_4760(); sdram_init_4760();
__asm__ (
"li $31, 0xbfc012e0 \n\t"
"jr $31 \n\t "
);
break; break;
default: default:
return; return;
@ -80,5 +75,11 @@ void c_main(void)
serial_puts("stage 1 finished: GPIO, clocks, SDRAM, UART setup\n" serial_puts("stage 1 finished: GPIO, clocks, SDRAM, UART setup\n"
"now jump back to BOOT ROM...\n"); "now jump back to BOOT ROM...\n");
if (ARG_CPU_ID == 0x4740) {
__asm__ (
"li $31, 0xbfc012e0 \n\t"
"jr $31 \n\t "
);
}
} }