mirror of
git://projects.qi-hardware.com/xburst-tools.git
synced 2024-11-01 16:25:20 +02:00
we have git repos keep u-boot
This commit is contained in:
xiangfu
parent
67126171bb
commit
0cebd4b4c8
@ -1,77 +0,0 @@
|
||||
*********************************************************************
|
||||
Steps to build the u-boot:
|
||||
|
||||
Download and install the cross toolchain gcc version 4:
|
||||
|
||||
$ cd /opt
|
||||
$ tar xjf mipseltools-gcc412-glibc261.tar.bz2
|
||||
$ export PATH=/opt/mipseltools-gcc412-glibc261/bin:$PATH
|
||||
|
||||
Download the u-boot tarball u-boot-1.1.6.tar.bz2 and unpack it:
|
||||
|
||||
$ tar xjf u-boot-1.1.6.tar.bz2
|
||||
|
||||
Download the latest u-boot patch and patch it to the u-boot tree:
|
||||
|
||||
$ cd u-boot-1.1.6
|
||||
$ gzip -cd ../u-boot-1.1.6-jz-yyyymmdd.patch.gz | patch -p1
|
||||
|
||||
Make defconfig of the JZSOC based platform, eg:
|
||||
|
||||
$ make apus_nand_config (NAND boot for JZ4750 APUS board)
|
||||
|
||||
$ make pavo_config (NOR boot for JZ4740 PAVO board)
|
||||
or
|
||||
$ make pavo_nand_config (NAND boot for JZ4740 PAVO board)
|
||||
|
||||
$ make pmpv2_config (NOR boot for JZ4730 PMP Ver 2.x board)
|
||||
or
|
||||
$ make pmpv2_nand_config (NAND boot for JZ4730 PMP Ver 2.x board)
|
||||
|
||||
Build the u-boot:
|
||||
|
||||
$ make
|
||||
|
||||
Then burn the u-boot-nand.bin (for NAND flash) or u-boot.bin (for NOR flash)
|
||||
to the target board by using JDI or USB boot tool.
|
||||
|
||||
|
||||
*********************************************************************
|
||||
u-boot-1.1.6-jz-20090306.patch.gz
|
||||
* Nand driver was modified to support using nandwrite_mlc utils in linux to
|
||||
write uImage:
|
||||
nandwrite_mlc -a -p /dev/mtd2 uImage
|
||||
|
||||
u-boot-1.1.6-jz-20090216.patch.gz
|
||||
|
||||
* Support Jz4750
|
||||
* Support NAND of 4KB pagesize
|
||||
* The ECC position in NAND oob could be modified by defining CFG_NAND_ECC_POS
|
||||
in include/configs/xxx.h
|
||||
|
||||
u-boot-1.1.6-jz-20080530.patch.gz:
|
||||
|
||||
* Added Jz4725 DIPPER Board Support.
|
||||
* Added FOXCONN_PT035TN01 LCD panel support for PAVO board.
|
||||
* Modify jz4740_nand.c to optimize the RS correction algorithm.
|
||||
|
||||
u-boot-1.1.6-jz-20080414.patch.gz:
|
||||
|
||||
* nand_spl/nand_boot_jz4740.c: fixed a fatal bug of nand_load(), which will
|
||||
fail to load u-boot when meeting a bad block.
|
||||
* Modify the nand read/write/erase commands to enable the bad block handling.
|
||||
|
||||
u-boot-1.1.6-jz-20080226.patch.gz:
|
||||
|
||||
* Fixed method to test NAND bad block.
|
||||
|
||||
u-boot-1.1.6-jz-20071205.patch.gz:
|
||||
|
||||
* Add Jz4720 virgo board.
|
||||
* Add SD 2.0 (SDHC) card support.
|
||||
* Fix the nand wirte command.
|
||||
|
||||
u-boot-1.1.6-jz-20071026.patch.gz:
|
||||
|
||||
* Full package support for Jz4730 and Jz4740.
|
||||
|
||||
@ -1,34 +0,0 @@
|
||||
From 64f6690dbfb512c7c55060f7b7ed1b5c085c3240 Mon Sep 17 00:00:00 2001
|
||||
From: xiangfu <xiangfu.z@gmail.com>
|
||||
Date: Mon, 13 Apr 2009 21:57:26 +0800
|
||||
Subject: [PATCH] change CPU speed
|
||||
|
||||
---
|
||||
include/configs/pavo.h | 4 ++--
|
||||
1 files changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/include/configs/pavo.h b/include/configs/pavo.h
|
||||
index 432a6f8..9f4d4ad 100644
|
||||
--- a/include/configs/pavo.h
|
||||
+++ b/include/configs/pavo.h
|
||||
@@ -50,7 +50,7 @@
|
||||
#define JZ4740_NORBOOT_CFG JZ4740_NORBOOT_16BIT /* NOR Boot config code */
|
||||
#define JZ4740_NANDBOOT_CFG JZ4740_NANDBOOT_B8R3 /* NAND Boot config code */
|
||||
|
||||
-#define CFG_CPU_SPEED 336000000 /* CPU clock: 336 MHz */
|
||||
+#define CFG_CPU_SPEED 252000000 /* CPU clock: 252 MHz */
|
||||
#define CFG_EXTAL 12000000 /* EXTAL freq: 12 MHz */
|
||||
#define CFG_HZ (CFG_EXTAL/256) /* incrementer freq */
|
||||
|
||||
@@ -104,7 +104,7 @@
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#define CFG_LONGHELP /* undef to save memory */
|
||||
-#define CFG_PROMPT "PAVO # " /* Monitor Command Prompt */
|
||||
+#define CFG_PROMPT "PI # " /* Monitor Command Prompt */
|
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
|
||||
#define CFG_MAXARGS 16 /* max number of command args*/
|
||||
--
|
||||
1.6.0.4
|
||||
|
||||
@ -1,76 +0,0 @@
|
||||
From e8b5d16e1b6ece6a4821efa0b54d19d076306fdd Mon Sep 17 00:00:00 2001
|
||||
From: xiangfu <xiangfu.z@gmail.com>
|
||||
Date: Tue, 14 Apr 2009 11:55:07 +0800
|
||||
Subject: [PATCH] we don't find the RXD on the Pi's PCB. so I make the u-boot driectly boot kernel.
|
||||
change some config base on GGV's nandboot.
|
||||
|
||||
---
|
||||
common/main.c | 3 ++-
|
||||
include/configs/pavo.h | 10 ++++++----
|
||||
2 files changed, 8 insertions(+), 5 deletions(-)
|
||||
|
||||
diff --git a/common/main.c b/common/main.c
|
||||
index cc4b50f..7b90e3b 100644
|
||||
--- a/common/main.c
|
||||
+++ b/common/main.c
|
||||
@@ -404,7 +404,8 @@ void main_loop (void)
|
||||
|
||||
debug ("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>");
|
||||
|
||||
- if (bootdelay >= 0 && s && !abortboot (bootdelay)) {
|
||||
+ //if (bootdelay >= 0 && s && !abortboot (bootdelay)) {
|
||||
+ if (s) {
|
||||
# ifdef CONFIG_AUTOBOOT_KEYED
|
||||
int prev = disable_ctrlc(1); /* disable Control C checking */
|
||||
# endif
|
||||
diff --git a/include/configs/pavo.h b/include/configs/pavo.h
|
||||
index 9f4d4ad..93f0a35 100644
|
||||
--- a/include/configs/pavo.h
|
||||
+++ b/include/configs/pavo.h
|
||||
@@ -25,13 +25,15 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
+#define DEBUG
|
||||
+#define CONFIG_DEBUG
|
||||
#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
|
||||
#define CONFIG_JzRISC 1 /* JzRISC core */
|
||||
#define CONFIG_JZSOC 1 /* Jz SoC */
|
||||
#define CONFIG_JZ4740 1 /* Jz4740 SoC */
|
||||
#define CONFIG_PAVO 1 /* PAVO validation board */
|
||||
|
||||
-#define CONFIG_LCD /* LCD support */
|
||||
+//#define CONFIG_LCD /* LCD support */
|
||||
//#define CONFIG_SLCD /* LCD support */
|
||||
|
||||
#ifndef CONFIG_SLCD /* LCD support */
|
||||
@@ -83,7 +85,7 @@
|
||||
#define CONFIG_BOOTFILE "uImage" /* file to load */
|
||||
#define CONFIG_BOOTARGS "mem=64M console=ttyS0,57600n8 ip=off rootfstype=yaffs2 root=/dev/mtdblock2 rw"
|
||||
#define CONFIG_BOOTCOMMAND "nand read 0x80600000 0x400000 0x300000;bootm"
|
||||
-#define CFG_AUTOLOAD "n" /* No autoload */
|
||||
+#define CFG_AUTOLOAD "y" /* No autoload */
|
||||
|
||||
//#define CONFIG_NET_MULTI
|
||||
|
||||
@@ -206,7 +208,7 @@
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
|
||||
// SDRAM paramters
|
||||
-#define SDRAM_BW16 0 /* Data bus width: 0-32bit, 1-16bit */
|
||||
+#define SDRAM_BW16 1 /* Data bus width: 0-32bit, 1-16bit */
|
||||
#define SDRAM_BANK4 1 /* Banks each chip: 0-2bank, 1-4bank */
|
||||
#define SDRAM_ROW 13 /* Row address: 11 to 13 */
|
||||
#define SDRAM_COL 9 /* Column address: 8 to 12 */
|
||||
@@ -217,7 +219,7 @@
|
||||
#define SDRAM_RCD 20 /* RAS# to CAS# Delay */
|
||||
#define SDRAM_TPC 20 /* RAS# Precharge Time */
|
||||
#define SDRAM_TRWL 7 /* Write Latency Time */
|
||||
-#define SDRAM_TREF 7812 /* Refresh period: 8192 refresh cycles/64ms */
|
||||
+#define SDRAM_TREF 15625 /* Refresh period: 8192 refresh cycles/64ms */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Cache Configuration
|
||||
--
|
||||
1.6.0.4
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user