qi-hardware/xburst-tools
1
0
Fork 0
mirror of git://projects.qi-hardware.com/xburst-tools.git synced 2024-11-22 12:36:17 +02:00
Code

[xbboot] cleanup files for jz4760

Browse Source 
Signed-off-by: Xiangfu Liu <xiangfu@sharism.cc>
This commit is contained in:
Xiangfu Liu 2010-06-07 19:29:49 +08:00
parent 7dc41fd855
commit 14fb5adc49
10 changed files with 130 additions and 113 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
xbboot/target-common/common-types.h
View File

@ -1,18 +0,0 @@
/*
* Authors: Xiangfu Liu <xiangfu@sharism.cc>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 3 of the License, or (at your option) any later version.
*/
#ifndef __COMMON_TYPES_H__
#define __COMMON_TYPES_H__
typedef unsigned int size_t;
typedef unsigned char u8;
typedef unsigned short u16;
typedef unsigned int u32;
#endif // __COMMON_TYPES_H__

36
xbboot/target-common/common.h Normal file
View File

@ -0,0 +1,36 @@
/*
* Authors: Xiangfu Liu <xiangfu@sharism.cc>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 3 of the License, or (at your option) any later version.
*/
#ifndef __COMMON_H__
#define __COMMON_H__
typedef unsigned int size_t;
typedef unsigned char u8;
typedef unsigned short u16;
typedef unsigned int u32;
#define REG8(addr) *((volatile u8 *)(addr))
#define REG16(addr) *((volatile u16 *)(addr))
#define REG32(addr) *((volatile u32 *)(addr))
u32 UART_BASE;
// tbd: do they have to be copied into globals? or just reference STAGE1_ARGS_ADDR?
volatile u32 ARG_EXTAL;
volatile u32 ARG_CPU_SPEED;
volatile u8 ARG_PHM_DIV;
volatile u32 ARG_UART_BASE;
volatile u32 ARG_UART_BAUD;
volatile u8 ARG_BUS_WIDTH_16;
volatile u8 ARG_BANK_ADDR_2BIT;
volatile u8 ARG_ROW_ADDR;
volatile u8 ARG_COL_ADDR;
volatile u32 ARG_CPU_ID;
#endif // __COMMON_H__

55
xbboot/target-common/jz4740.h
View File

@ -21,22 +21,7 @@
#ifndef __JZ4740_H__
#define __JZ4740_H__
#include "common-types.h"
#ifndef __ASSEMBLY__
#define UCOS_CSP 0
#if UCOS_CSP
#define __KERNEL__
#include <bsp.h>
#include <types.h>
#include <sysdefs.h>
#include <cacheops.h>
#define KSEG0 KSEG0BASE
#else
/* #include <asm/cacheops.h> */
#endif
#include "common.h"
#define cache_unroll(base,op) \
__asm__ __volatile__(" \
@ -48,34 +33,7 @@
: \
: "r" (base), \
"i" (op));
#if 0
static inline void jz_flush_dcache(void)
{
unsigned long start;
unsigned long end;
start = KSEG0;
end = start + CFG_DCACHE_SIZE;
while (start < end) {
cache_unroll(start,Index_Writeback_Inv_D);
start += CFG_CACHELINE_SIZE;
}
}
static inline void jz_flush_icache(void)
{
unsigned long start;
unsigned long end;
start = KSEG0;
end = start + CFG_ICACHE_SIZE;
while(start < end) {
cache_unroll(start,Index_Invalidate_I);
start += CFG_CACHELINE_SIZE;
}
}
#endif
/* cpu pipeline flush */
static inline void jz_sync(void)
{
@ -112,17 +70,6 @@ static inline u32 jz_readl(u32 address)
return *((volatile u32 *)address);
}
#define REG8(addr) *((volatile u8 *)(addr))
#define REG16(addr) *((volatile u16 *)(addr))
#define REG32(addr) *((volatile u32 *)(addr))
#else
#define REG8(addr) (addr)
#define REG16(addr) (addr)
#define REG32(addr) (addr)
#endif /* !ASSEMBLY */
/* Boot ROM Specification */

82
xbboot/target-common/jz4760.h
View File

@ -4,11 +4,87 @@
#ifndef __JZ4760_H__
#define __JZ4760_H__
#include "common-types.h"
#ifndef __ASSEMBLY__
#if 0 /* if 0, for spl program */
#define cache_unroll(base,op) \
__asm__ __volatile__(" \
.set noreorder; \
.set mips3; \
cache %1, (%0); \
.set mips0; \
.set reorder" \
: \
: "r" (base), \
"i" (op));
static inline void jz_flush_dcache(void)
{
unsigned long start;
unsigned long end;
start = KSEG0;
end = start + CFG_DCACHE_SIZE;
while (start < end) {
cache_unroll(start,Index_Writeback_Inv_D);
start += CFG_CACHELINE_SIZE;
}
}
static inline void jz_flush_icache(void)
{
unsigned long start;
unsigned long end;
start = KSEG0;
end = start + CFG_ICACHE_SIZE;
while(start < end) {
cache_unroll(start,Index_Invalidate_I);
start += CFG_CACHELINE_SIZE;
}
}
/* cpu pipeline flush */
static inline void jz_sync(void)
{
__asm__ volatile ("sync");
}
static inline void jz_writeb(u32 address, u8 value)
{
*((volatile u8 *)address) = value;
}
static inline void jz_writew(u32 address, u16 value)
{
*((volatile u16 *)address) = value;
}
static inline void jz_writel(u32 address, u32 value)
{
*((volatile u32 *)address) = value;
}
static inline u8 jz_readb(u32 address)
{
return *((volatile u8 *)address);
}
static inline u16 jz_readw(u32 address)
{
return *((volatile u16 *)address);
}
static inline u32 jz_readl(u32 address)
{
return *((volatile u32 *)address);
}
#endif
#endif /* !ASSEMBLY */
//----------------------------------------------------------------------
// Boot ROM Specification
//
/* NOR Boot config */
#define JZ4760_NORBOOT_8BIT 0x00000000 /* 8-bit data bus flash */
#define JZ4760_NORBOOT_16BIT 0x10101010 /* 16-bit data bus flash */
@ -3359,6 +3435,8 @@
// Module Operation Definitions
//
//----------------------------------------------------------------------
#ifndef __ASSEMBLY__
#define is_share_mode() (1)
/***************************************************************************
@ -6351,4 +6429,6 @@ do { \
REG_BCH_CNT |= (n) << BCH_CNT_ENC_BIT; \
} while(0)
#endif /* !__ASSEMBLY__ */
#endif /* __JZ4760_H__ */

2
xbboot/target-common/serial.c
View File

@ -10,8 +10,6 @@
#include "serial.h"
#include "jz4740.h"
u32 UART_BASE;
void serial_putc(char c)
{
volatile u8* uart_lsr = (volatile u8*)(UART_BASE + OFF_LSR);

7
xbboot/target-common/serial.h
View File

@ -7,12 +7,13 @@
// 3 of the License, or (at your option) any later version.
//
#include "common-types.h"
extern u32 UART_BASE;
#ifndef _SERIAL_H_
#define _SERIAL_H_
void serial_putc(char c);
void serial_puts(const char *s);
void serial_put_hex(unsigned int v);
int serial_getc();
int serial_tstc();
#endif

2
xbboot/target-stage1/Makefile
View File

@ -17,7 +17,7 @@ CFLAGS = -O2 -fno-unit-at-a-time -fno-zero-initialized-in-bss -mips32 -fno-pic \
LDFLAGS = -nostdlib -EL -T target.ld
VPATH = ../target-common
OBJS = head.o stage1.o serial.o board-jz4740.o
OBJS = head.o stage1.o serial.o board-jz4740.o #board-jz4760.o
all: stage1.bin

2
xbboot/target-stage1/board-jz4740.c
View File

@ -8,8 +8,6 @@
//
#include "jz4740.h"
#include "serial.h"
#include "board-jz4740.h"
void gpio_init_4740()
{

30
xbboot/target-stage1/board-jz4740.h
View File

@ -1,30 +0,0 @@
//
// Authors: Xiangfu Liu <xiangfu@sharism.cc>
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public License
// as published by the Free Software Foundation; either version
// 3 of the License, or (at your option) any later version.
//
#ifndef __BOARD_JZ4740_H__
#define __BOARD_JZ4740_H__
void gpio_init_4740();
void pll_init_4740();
void serial_init_4740();
void sdram_init_4740();
void nand_init_4740();
// tbd: do they have to be copied into globals? or just reference STAGE1_ARGS_ADDR?
volatile u32 ARG_EXTAL;
volatile u32 ARG_CPU_SPEED;
volatile u8 ARG_PHM_DIV;
volatile u32 ARG_UART_BASE;
volatile u32 ARG_UART_BAUD;
volatile u8 ARG_BUS_WIDTH_16;
volatile u8 ARG_BANK_ADDR_2BIT;
volatile u8 ARG_ROW_ADDR;
volatile u8 ARG_COL_ADDR;
volatile u32 ARG_CPU_ID;
#endif

9
xbboot/target-stage1/stage1.c
View File

@ -7,10 +7,15 @@
// 3 of the License, or (at your option) any later version.
//
#include "jz4740.h"
#include "common.h"
#include "serial.h"
#include "board-jz4740.h"
#include "jz4740.h"
extern void gpio_init_4740();
extern void pll_init_4740();
extern void serial_init_4740();
extern void sdram_init_4740();
extern void nand_init_4740();
void load_args()
{