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add some initial cpu code in led.S
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parent
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commit
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@ -2,16 +2,74 @@
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_start: b start_code
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start_code:
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ldr sp,=1024*4
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/*
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* set the cpu to SVC32 mode
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*/
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mrs r0,cpsr
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bic r0,r0,#0x1f
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orr r0,r0,#0xd3
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msr cpsr,r0
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/* turn off the watchdog */
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# define pWTCON 0x53000000
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# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
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# define INTSUBMSK 0x4A00001C
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# define INTSUBMSK_val 0xffff
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# define CAMDIVN 0x4C000018
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ldr r0, =pWTCON
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mov r1, #0x0
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str r1, [r0]
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/*
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* mask all IRQs by setting all bits in the INTMR - default
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*/
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mov r1, #0xffffffff
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ldr r0, =INTMSK
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str r1, [r0]
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ldr r1, =INTSUBMSK_val
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ldr r0, =INTSUBMSK
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str r1, [r0]
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/* Make sure we get FCLK:HCLK:PCLK = 1:3:6 */
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ldr r0, =CAMDIVN
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mov r1, #0
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str r1, [r0]
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/* Clock asynchronous mode */
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mrc p15, 0, r1, c1, c0, 0
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orr r1, r1, #0xc0000000
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mcr p15, 0, r1, c1, c0, 0
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/* enable uart */
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ldr r0, =0x4c00000c /* clkcon */
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ldr r1, =0x7fff0 /* all clocks on */
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str r1, [r0]
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/* gpio UART0 init */
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ldr r0, =0x56000070
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mov r1, #0xaa
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str r1, [r0]
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/* init uart */
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ldr r0, =0x50000000
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mov r1, #0x03
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str r1, [r0]
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ldr r1, =0x245
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str r1, [r0, #0x04]
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mov r1, #0x01
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str r1, [r0, #0x08]
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mov r1, #0x00
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str r1, [r0, #0x0c]
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mov r1, #0x1a
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str r1, [r0, #0x28]
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/* blink led */
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ldr sp,=1024*4
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.extern blink_led
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bl blink_led
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.global delay
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delay:
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subs r0,r0,#0x1
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