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mirror of git://projects.qi-hardware.com/xburst-tools.git synced 2025-04-21 12:27:27 +03:00

add nand flash tools

This commit is contained in:
xiangfu
2009-04-05 16:26:33 +00:00
parent e043feab69
commit 5c31ed05b7
12 changed files with 12522 additions and 0 deletions

406
nandprog/include/configs.h Normal file
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#ifndef __CONFIGS_H__
#define __CONFIGS_H__
#include "include.h"
np_data config_list[]=
{
{
//No 0
//The config for jz4730 uboot
.pt = JZ4730,
.et = HARDHM, //HW HM ECC
.ep = 0, //ecc position index 0
.bw = 8,
.ps = 2048,
.os = 64,
.ppb = 64,
.rc = 3,
.bbp = 0,
.bba = 0,
.ebase = 0x13010000,
.dport = 0x14000000,
.gport = 0,
.bm_ms = 0x100,
.pm_ms = 0xb0000,
.gm_ms = 0,
.ap_offset = 0x80000,
.cp_offset = 0x40000,
.nand_init = nand_init_4730,
.nand_erase = nand_erase_4730,
.nand_program = nand_program_4730,
.nand_read = nand_read_4730,
.nand_read_oob = nand_read_oob_4730,
.nand_block_markbad = nand_block_markbad,
.nand_check = nand_check_cmp,
.nand_check_block = nand_check_block,
.nand_select = chip_select_4730,
},
{
//No 1
//The config for jz4730 linux fs
.pt = JZ4730,
.et = HARDHM, //HW HM ECC
.ep = 1, //ecc position index 1
.bw = 8,
.ps = 2048,
.os = 64,
.ppb = 64,
.rc = 3,
.bbp = 0,
.bba = 0,
.ebase = 0x13010000,
.dport = 0x14000000,
.gport = 0,
.bm_ms = 0x100,
.pm_ms = 0xb0000,
.gm_ms = 0,
.ap_offset = 0x80000,
.cp_offset = 0x40000,
.nand_init = nand_init_4730,
.nand_erase = nand_erase_4730,
.nand_program = nand_program_4730,
.nand_read = nand_read_4730,
.nand_read_oob = nand_read_oob_4730,
.nand_block_markbad = nand_block_markbad,
.nand_check = nand_check_cmp,
.nand_check_block = nand_check_block,
.nand_select = chip_select_4730,
},
{
//No 2
//The config for jz4730 ucos
.pt = JZ4730,
.et = HARDHM, //HW HM ECC
.ep = 1, //need modify
.bw = 8,
.ps = 2048,
.os = 64,
.ppb = 64,
.rc = 3,
.bbp = 0, //need modify
.bba = 0, //need modify
//do not need modify
.ebase = 0x13010000,
.dport = 0x14000000,
.gport = 0,
.bm_ms = 0x100,
.pm_ms = 0xb0000,
.gm_ms = 0,
.ap_offset = 0x80000,
.cp_offset = 0x40000,
.nand_init = nand_init_4730,
.nand_erase = nand_erase_4730,
.nand_program = nand_program_4730,
.nand_read = nand_read_4730,
.nand_read_oob = nand_read_oob_4730,
.nand_block_markbad = nand_block_markbad,
.nand_check = nand_check_cmp,
.nand_check_block = nand_check_block,
.nand_select = chip_select_4730,
},
{
//No 3
//The config for jz4730 wince
.pt = JZ4730,
.et = HARDHM, //HW HM ECC
.ep = 1, //need modify
.bw = 8,
.ps = 2048,
.os = 64,
.ppb = 64,
.rc = 3,
.bbp = 0, //need modify
.bba = 0, //need modify
//do not need modify
.ebase = 0x13010000,
.dport = 0x14000000,
.gport = 0,
.bm_ms = 0x100,
.pm_ms = 0xb0000,
.gm_ms = 0,
.ap_offset = 0x80000,
.cp_offset = 0x40000,
.nand_init = nand_init_4730,
.nand_erase = nand_erase_4730,
.nand_program = nand_program_4730,
.nand_read = nand_read_4730,
.nand_read_oob = nand_read_oob_4730,
.nand_block_markbad = nand_block_markbad,
.nand_check = nand_check_cmp,
.nand_check_block = nand_check_block,
.nand_select = chip_select_4730,
},
{
//No 4
//The config for jz4740 uboot use HW RS
.pt = JZ4740,
.et = HARDRS, //HW HM ECC
.ep = 2, //need modify
.bw = 8,
.ps = 2048,
.os = 64,
.ppb = 128,
.rc = 3,
.bbp = 0, //need modify
.bba = 0, //need modify
//do not need modify
.ebase = 0x13010000,
.dport = 0x18000000,
.gport = 0x10010000,
.bm_ms = 0x100,
.pm_ms = 0x20000,
.gm_ms = 0x500,
.ap_offset = 0x10000,
.cp_offset = 0x8000,
.nand_init = nand_init_4740,
.nand_erase = nand_erase_4740,
.nand_program = nand_program_4740,
.nand_read = nand_read_4740_rs,
.nand_read_oob = nand_read_oob_4740,
.nand_block_markbad = nand_block_markbad_4740,
.nand_check = nand_check_cmp,
.nand_check_block = nand_check_block_4740,
.nand_select = chip_select_4740,
},
{
//No 5
//The config for jz4740 linux use HW RS
.pt = JZ4740,
.et = HARDRS, //HW HM ECC
.ep = 3, //need modify
.bw = 8,
.ps = 2048,
.os = 64,
.ppb = 128,
.rc = 3,
.bbp = 1, //need modify
.bba = 0, //need modify
//do not need modify
.ebase = 0x13010000,
.dport = 0x18000000,
.gport = 0x10010000,
.bm_ms = 0x100,
.pm_ms = 0x20000,
.gm_ms = 0x500,
.ap_offset = 0x10000,
.cp_offset = 0x8000,
.nand_init = nand_init_4740,
.nand_fini = nand_fini_4740,
.nand_erase = nand_erase_4740,
.nand_program = nand_program_4740,
.nand_read = nand_read_4740_rs,
.nand_read_oob = nand_read_oob_4740,
.nand_block_markbad = nand_block_markbad_4740,
.nand_check = nand_check_cmp,
.nand_check_block = nand_check_block_4740,
.nand_select = chip_select_4740,
},
{
//No 6
//The config for jz4740 linux use HW HM
.pt = JZ4740,
.et = HARDHM, //HW HM ECC
.ep = 1, //need modify
.bw = 8,
.ps = 2048,
.os = 64,
.ppb = 128,
.rc = 3,
.bbp = 0, //need modify
.bba = 0, //need modify
//do not need modify
.ebase = 0x13010000,
.dport = 0x18000000,
.gport = 0x10010000,
.bm_ms = 0x100,
.pm_ms = 0x20000,
.gm_ms = 0x500,
.ap_offset = 0x10000,
.cp_offset = 0x8000,
.nand_init = nand_init_4740,
.nand_erase = nand_erase_4740,
.nand_program = nand_program_4740,
.nand_read = nand_read_4740_hm,
.nand_read_oob = nand_read_oob_4740,
.nand_block_markbad = nand_block_markbad_4740,
.nand_check = nand_check_cmp,
.nand_check_block = nand_check_block_4740,
.nand_select = chip_select_4740,
},
{
//No 7
//The config for jz4740 ucos use HW RS
.pt = JZ4740,
.et = HARDRS, //HW HM ECC
// .ep = 3, //need modify
.bw = 8,
.ps = 2048,
.os = 64,
.ppb = 128,
.rc = 3,
// .bbp = 0, //need modify
// .bba = 0, //need modify
//do not need modify
.ebase = 0x13010000,
.dport = 0x18000000,
.gport = 0x10010000,
.bm_ms = 0x100,
.pm_ms = 0x20000,
.gm_ms = 0x500,
.ap_offset = 0x10000,
.cp_offset = 0x8000,
.nand_init = nand_init_4740,
.nand_erase = nand_erase_4740,
.nand_program = nand_program_4740,
.nand_read = nand_read_4740_rs,
.nand_read_oob = nand_read_oob_4740,
.nand_block_markbad = nand_block_markbad_4740,
.nand_check = nand_check_cmp,
.nand_check_block = nand_check_block_4740,
.nand_select = chip_select_4740,
},
{
//No 8
//The config for jz4740 ucos use HW HM
.pt = JZ4740,
.et = HARDHM, //HW HM ECC
// .ep = 3, //need modify
.bw = 8,
.ps = 2048,
.os = 64,
.ppb = 128,
.rc = 3,
// .bbp = 0, //need modify
// .bba = 0, //need modify
//do not need modify
.ebase = 0x13010000,
.dport = 0x18000000,
.gport = 0x10010000,
.bm_ms = 0x100,
.pm_ms = 0x20000,
.gm_ms = 0x500,
.ap_offset = 0x10000,
.cp_offset = 0x8000,
.nand_init = nand_init_4740,
.nand_erase = nand_erase_4740,
.nand_program = nand_program_4740,
.nand_read = nand_read_4740_hm,
.nand_read_oob = nand_read_oob_4740,
.nand_block_markbad = nand_block_markbad_4740,
.nand_check = nand_check_cmp,
.nand_check_block = nand_check_block_4740,
.nand_select = chip_select_4740,
},
{
//No 9
//The config for jz4740 wince use HW RS
.pt = JZ4740,
.et = HARDRS, //HW HM ECC
// .ep = 3, //need modify
.bw = 8,
.ps = 2048,
.os = 64,
.ppb = 128,
.rc = 3,
// .bbp = 0, //need modify
// .bba = 0, //need modify
//do not need modify
.ebase = 0x13010000,
.dport = 0x18000000,
.gport = 0x10010000,
.bm_ms = 0x100,
.pm_ms = 0x20000,
.gm_ms = 0x500,
.ap_offset = 0x10000,
.cp_offset = 0x8000,
.nand_init = nand_init_4740,
.nand_erase = nand_erase_4740,
.nand_program = nand_program_4740,
.nand_read = nand_read_4740_rs,
.nand_read_oob = nand_read_oob_4740,
.nand_block_markbad = nand_block_markbad_4740,
.nand_check = nand_check_cmp,
.nand_check_block = nand_check_block_4740,
.nand_select = chip_select_4740,
},
{
//No 10
//The config for jz4740 wince use HW RS
.pt = JZ4740,
.et = HARDHM, //HW HM ECC
// .ep = 3, //need modify
.bw = 8,
.ps = 2048,
.os = 64,
.ppb = 128,
.rc = 3,
// .bbp = 0, //need modify
// .bba = 0, //need modify
//do not need modify
.ebase = 0x13010000,
.dport = 0x18000000,
.gport = 0x10010000,
.bm_ms = 0x100,
.pm_ms = 0x20000,
.gm_ms = 0x500,
.ap_offset = 0x10000,
.cp_offset = 0x8000,
.nand_init = nand_init_4740,
.nand_erase = nand_erase_4740,
.nand_program = nand_program_4740,
.nand_read = nand_read_4740_hm,
.nand_read_oob = nand_read_oob_4740,
.nand_block_markbad = nand_block_markbad_4740,
.nand_check = nand_check_cmp,
.nand_check_block = nand_check_block_4740,
.nand_select = chip_select_4740,
},
};
#endif

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nandprog/include/include.h Normal file
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#ifndef __INCLUDE_H__
#define __INCLUDE_H__
//#include "nand_ecc.h"
#define u32 unsigned int
#define u16 unsigned short
#define u8 unsigned char
#define MAX_PAGE 0xffffffff
#define PAGE_SIZE np->ps
#define OOB_SIZE np->os
#define OOBPAGE_SIZE (PAGE_SIZE + OOB_SIZE)
#define MAX_BUF_PAGE np->ppb
#define MAX_BUF_SIZE OOBPAGE_SIZE*MAX_BUF_PAGE
#define MAX_RETRY 3
#define LAST_PAGE 65536
#define LOG_FILENAME "nprog.log"
#define NUM_FILENAME "number.log"
enum
{
JZ4730CPU,
LINUXHM,
JZ4740CPU,
LINUXRS,
USERSPEC,
};
struct nand_oobinfo
{
int eccname;
unsigned int eccbytes;
unsigned int eccpos[64];
};
enum
{
SOFTHM,
SOFTRS,
HARDHM,
HARDRS
};
enum
{
JZ4730,
JZ4740,
JZ4760
};
enum
{
READ_FLASH,
WRITE_FLASH
};
typedef struct _NP_DATA
{
u8 pt; //processor type jz4730/jz4740/jz4760....
u8 et; //ECC type software HM/RS or hardware HM/RS
u8 ep; //ECC position index
u8 ops; //opration type read/write
u8 cs; //chip select index number
u8 *fname; //Source or object file name
u32 spage; //opration start page number of nand flash
u32 epage; //opration end page number of nand flash
u32 bw; //nand flash bus width
u32 ps; //nand flash page size
u32 os; //nand flash oob size
u32 ppb; //nand flash page per block
u32 rc; //nand flash row syscle
u32 bbp; //nand flash bad block ID position
u32 bba; //nand flash bad block ID page position
u32 ebase; //EMC base PHY address
void *base_map; //EMC base mapped address
u32 bm_ms; // EMC base mapped size
u32 dport; //Nand flash port base PHY address
void *port_map; //nand port mapped address
u32 pm_ms; // EMC base mapped size
u32 gport; //GPIO base PHY address
void *gpio_map; //GPIO mapped address
u32 gm_ms; // EMC base mapped size
u32 ap_offset; //addrport offset
u32 cp_offset; //cmdportoffset
int (*nand_init)(struct _NP_DATA *);
int (*nand_fini)(void);
u32 (*nand_query)(void);
int (*nand_erase)(int, int, int);
int (*nand_program)(u8 *, int, int );
int (*nand_read)(u8 *, u32, u32);
int (*nand_read_raw)(u8 *, u32, u32);
int (*nand_read_oob)(u8 *, u32, u32);
int (*nand_check_block) (u32);
int (*nand_check) (u8 *,u8 *,u32 );
void (*nand_block_markbad) (u32);
int (*nand_select) (u8);
}np_data;
//jz4730 functions
extern int nand_init_4730(np_data *);
extern int nand_fini_4730(void);
extern unsigned int nand_query_4730(void);
extern int nand_erase_4730(int blk_num, int sblk, int force);
extern int nand_program_4730(u8 *buf, int startpage, int pagenum);
extern int nand_read_4730(u8 *buf, u32 startpage, u32 pagenum);
extern int nand_read_raw_4730(u8 *buf, u32 startpage, u32 pagenum);
extern int nand_read_oob_4730(u8 *buf, u32 startpage, u32 pagenum);
extern int nand_check_block(u32);
extern void nand_block_markbad(u32);
extern int chip_select_4730(u8 cs);
//jz4740 functions
extern int nand_init_4740(np_data *);
extern int nand_fini_4740(void);
extern unsigned int nand_query_4740(void);
extern int nand_erase_4740(int blk_num, int sblk, int force);
extern int nand_program_4740(u8 *buf, int startpage, int pagenum);
extern int nand_read_4740_hm(u8 *buf, u32 startpage, u32 pagenum);
extern int nand_read_4740_rs(u8 *buf, u32 startpage, u32 pagenum);
extern int nand_read_raw_4740(u8 *buf, u32 startpage, u32 pagenum);
extern int nand_read_oob_4740(u8 *buf, u32 startpage, u32 pagenum);
extern int nand_check_block_4740(u32);
extern void nand_block_markbad_4740(u32);
extern int chip_select_4740(u8 cs);
//common functions
extern int cmdline(int,char **,np_data *);
extern np_data * cmdinit();
extern int cmdexcute(np_data *);
extern int cmdexit(np_data *);
extern int nand_check_cmp(u8 *buf1,u8 *buf2,u32 len);
extern np_data * load_cfg();
#endif

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nandprog/include/jz4730.h Normal file

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nandprog/include/jz4740.h Normal file

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#ifndef __NAND_ECC_H__
#define __NAND_ECC_H__
#include "include.h"
// This head file define these ecc position and ecc types
struct nand_oobinfo oob_64[] =
{
{
.eccname = JZ4730CPU,
.eccbytes = 24,
.eccpos =
{
4, 5, 6,
8, 9, 10,
12,13,14,
16,17,18,
20,21,22,
24,25,26,
28,29,30,
32,33,34,
},
},
{
.eccname = LINUXHM,
.eccbytes = 24,
.eccpos =
{
41, 40, 42,
44, 43, 45,
47, 46, 48,
50, 49, 51,
53, 52, 54,
56, 55, 57,
59, 58, 60,
62, 61, 63
/* old need change position
40, 41, 42,
43, 44, 45,
46, 47, 48,
49, 50, 51,
52, 53, 54,
55, 56, 57,
58, 59, 60,
61, 62, 63
*/
},
},
{
.eccname = JZ4740CPU,
.eccbytes = 36,
.eccpos =
{
6, 7, 8, 9, 10,11,12,13,14,
15,16,17,18,19,20,21,22,23,
24,25,26,27,28,29,30,31,32,
33,34,35,36,37,38,39,40,41
},
},
{
.eccname = LINUXRS,
.eccbytes = 36,
.eccpos =
{
28, 29, 30, 31,
32, 33, 34, 35, 36, 37, 38, 39,
40, 41, 42, 43, 44, 45, 46, 47,
48, 49, 50, 51, 52, 53, 54, 55,
56, 57, 58, 59, 60, 61, 62, 63
},
},
{ //this one must update by config file
.eccname = USERSPEC,
.eccbytes = 64,
.eccpos =
{
0, 0, 0, 0,
},
},
};
#endif