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Created xbboot.

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Wolfgang Spraul 2009-08-21 14:04:09 +08:00
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m4
autom4te.cache
config.h
config.h.in
config.log
config.status
Makefile
Makefile.in
configure
stamp-h1
aclocal.m4

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<http://www.gnu.org/licenses/>.
The GNU General Public License does not permit incorporating your program
into proprietary programs. If your program is a subroutine library, you
may consider it more useful to permit linking proprietary applications with
the library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License. But first, please read
<http://www.gnu.org/philosophy/why-not-lgpl.html>.

4
xbboot/ChangeLog Normal file
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* xbboot ChangeLog
15Aug2009 [ws] Started.

2
xbboot/Makefile.am Normal file
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SUBDIRS = host-app
EXTRA_DIST = autogen.sh

26
xbboot/README Normal file
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@ -0,0 +1,26 @@
*
* xbboot
*
* Use the Ingenic XBurst USB boot protocol to boot, load binaries
* into memory and execute them.
*
Authors: Wolfgang Spraul <wolfgang@qi-hardware.com>
This program is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License
as published by the Free Software Foundation; either version
3 of the License, or (at your option) any later version.
Build Requirements: libusb-dev, libconfuse-dev
Build and Installation:
./autogen.sh
./configure
make
make install
*) make install will install the xbboot binary to /usr/bin/xbboot
and the bootloader running on the device into /usr/share/xburst-tools
Examples:
<TBD>

3
xbboot/autogen.sh Executable file
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#!/bin/sh
export AUTOMAKE="automake --foreign --add-missing --copy"
autoreconf

48
xbboot/configure.ac Normal file
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@ -0,0 +1,48 @@
#
# autoconf configuration for xbboot
#
AC_PREREQ(2.63)
AC_INIT([xbboot], [0.1])
AC_CONFIG_AUX_DIR(m4)
AM_INIT_AUTOMAKE(AC_PACKAGE_NAME, AC_PACKAGE_VERSION)
AM_CONFIG_HEADER([config.h])
AM_MAINTAINER_MODE
# Checks for programs.
AC_PROG_CC
AC_PROG_CXX
# Checks for libraries.
AC_CHECK_LIB([c], [main])
AC_CHECK_LIB([confuse], [main], [], [
echo "Error! You need to have libconfuse-dev.\n"
echo "Maybe run 'sudo apt-get install libconfuse-dev' under debian"
exit -1 ])
AC_CHECK_LIB([gcc], [main])
AC_CHECK_LIB([m], [main])
AC_CHECK_LIB([usb], [main], [], [
echo "Error! You need to have libusb-dev.\n"
echo "Maybe run 'sudo apt-get install libusb-dev' under debian"
exit -1 ])
LIBS="$LIBS $USB_LIBS"
CFLAGS="$CFLAGS $USB_CFLAGS"
# Checks for header files.
AC_HEADER_STDC
AC_CHECK_HEADERS([fcntl.h stdint.h stdlib.h string.h unistd.h])
# Checks for typedefs, structures, and compiler characteristics.
AC_C_INLINE
AC_TYPE_SIZE_T
AC_TYPE_UINT8_T
# Checks for library functions.
AC_FUNC_MALLOC
AC_FUNC_MEMCMP
AC_CHECK_FUNCS([memset strerror])
AC_CONFIG_FILES(Makefile host-app/Makefile)
AC_OUTPUT

6
xbboot/host-app/.gitignore vendored Normal file
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@ -0,0 +1,6 @@
.deps
host_main.o
Makefile
Makefile.in
xbboot_version.h
xbboot

19
xbboot/host-app/Makefile.am Normal file
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@ -0,0 +1,19 @@
AM_CFLAGS = -pedantic -Wall -W -O1 -g3 -std=gnu99 -lusb -lconfuse
xbboot_version.h:
echo -e '#ifndef XBBOOT_VERSION' \
'\n#define XBBOOT_VERSION "20090815-1"' \
'\n#endif' > xbboot_version.h
BUILT_SOURCES = xbboot_version.h
bin_PROGRAMS = xbboot
xbboot_SOURCES = host_main.c
prefix = /usr
datadir = /usr/share/xburst-tools
data_DATA = ../target-stage1/stage1.bin
EXTRA_DIST = $(datadir)
../target-stage1/stage.bin:
$(MAKE) -C ../target-stage1

330
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//
// Authors: Wolfgang Spraul <wolfgang@qi-hardware.com>
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public License
// as published by the Free Software Foundation; either version
// 3 of the License, or (at your option) any later version.
//
#include <stdio.h>
#include <string.h>
#include <usb.h>
#include "xbboot_version.h"
#define HIWORD(dw) (((dw) >> 16) & 0xFFFF)
#define LOWORD(dw) ((dw) & 0xFFFF)
#define INGENIC_VENDOR_ID 0x601A
#define INGENIC_XBURST_USBBOOT 0x4740
// REQ_ values are negative so they can be mixed together with the VR_ types in a signed integer.
#define REQ_BULK_READ -1
#define REQ_BULK_WRITE -2
#define VR_GET_CPU_INFO 0x00
#define VR_SET_DATA_ADDRESS 0x01
#define VR_SET_DATA_LENGTH 0x02
#define VR_FLUSH_CACHES 0x03
#define VR_PROGRAM_START1 0x04
#define VR_PROGRAM_START2 0x05
#define VR_NOR_OPS 0x06
#define VR_NAND_OPS 0x07
#define VR_SDRAM_OPS 0x08
#define VR_CONFIGRATION 0x09
#define VR_GET_NUM 0x0a
#define USB_TIMEOUT 3000
#define VR_GET_CPU_INFO_LEN 8
#define INGENIC_IN_ENDPOINT 0x81
#define INGENIC_OUT_ENDPOINT 0x01
int main(int argc, char** argv)
{
struct usb_device* xburst_dev = 0;
uint8_t xburst_interface = 0;
struct usb_dev_handle* xburst_h = 0;
int request_type, usb_status;
if (argc < 2
|| !strcmp(argv[1], "-h")
|| !strcmp(argv[1], "--help")) {
printf("\n"
"xbboot version %s - Ingenic XBurst USB Boot Vendor Requests\n"
"(c) 2009 Wolfgang Spraul\n"
"Report bugs to <wolfgang@qi-hardware.com>.\n"
"\n"
"xbboot [vendor_request] ... (must run as root)\n"
" -h --help print this help message\n"
" -v --version print the version number\n"
"\n"
" bulk_read <len> read len bulk bytes from USB, write to stdout\n"
" bulk_write <path> write file at <path> to USB\n"
" [get_info | VR_GET_CPU_INFO] read 8-byte CPU info and write to stdout\n"
" [set_addr | VR_SET_DATA_ADDRESS] <addr> send memory address\n"
" [set_len | VR_SET_DATA_LENGTH] <len> send data length\n"
" [flush_cache | VR_FLUSH_CACHES] flush I-Cache and D-Cache\n"
" [start1 | VR_PROGRAM_START1] <addr> transfer data from D-Cache to I-Cache and branch to I-Cache\n"
" [start2 | VR_PROGRAM_START2] <addr> branch to <addr> directly\n"
"\n"
"- all numbers can be prefixed 0x for hex otherwise decimal\n"
"\n", XBBOOT_VERSION);
// stage1: 0x80002000
// stage2: 0x81C00000
// u-boot: 0x80600000
// uImage: 0x80010000
return EXIT_SUCCESS;
}
if (!strcmp(argv[1], "-v") || !strcmp(argv[1], "--version")) {
printf("xbboot version %s\n", XBBOOT_VERSION);
return EXIT_SUCCESS;
}
if (!strcmp(argv[1], "bulk_read"))
request_type = REQ_BULK_READ;
else if (!strcmp(argv[1], "bulk_write"))
request_type = REQ_BULK_WRITE;
else if (!strcmp(argv[1], "VR_GET_CPU_INFO") || !strcmp(argv[1], "get_info"))
request_type = VR_GET_CPU_INFO;
else if (!strcmp(argv[1], "VR_SET_DATA_ADDRESS") || !strcmp(argv[1], "set_addr"))
request_type = VR_SET_DATA_ADDRESS;
else if (!strcmp(argv[1], "VR_SET_DATA_LENGTH") || !strcmp(argv[1], "set_len"))
request_type = VR_SET_DATA_LENGTH;
else if (!strcmp(argv[1], "VR_FLUSH_CACHES") || !strcmp(argv[1], "flush_cache"))
request_type = VR_FLUSH_CACHES;
else if (!strcmp(argv[1], "VR_PROGRAM_START1") || !strcmp(argv[1], "start1"))
request_type = VR_PROGRAM_START1;
else if (!strcmp(argv[1], "VR_PROGRAM_START2") || !strcmp(argv[1], "start2"))
request_type = VR_PROGRAM_START2;
else {
fprintf(stderr, "Error - unknown vendor request %s - run with --help to see all requests\n", argv[1]);
return EXIT_FAILURE;
}
if ((getuid()) || (getgid())) {
fprintf(stderr, "Error - you must be root to run '%s'\n", argv[0]);
return EXIT_FAILURE;
}
usb_init();
usb_find_busses();
usb_find_devices();
// look for Ingenic XBurst USB boot device & interface
{
{
struct usb_bus* usb_bus;
struct usb_device* usb_dev;
for (usb_bus = usb_get_busses(); usb_bus != 0; usb_bus = usb_bus->next) {
for (usb_dev = usb_bus->devices; usb_dev != 0; usb_dev = usb_dev->next) {
if (usb_dev->descriptor.idVendor == INGENIC_VENDOR_ID
&& usb_dev->descriptor.idProduct == INGENIC_XBURST_USBBOOT) {
if (xburst_dev) {
fprintf(stderr, "Error - more than one XBurst boot device found.\n");
goto xout;
}
xburst_dev = usb_dev;
// keep searching to make sure there is only 1 XBurst device
}
}
}
if (!xburst_dev) {
fprintf(stderr, "Error - no XBurst boot device found.\n");
goto xout;
}
}
{
struct usb_config_descriptor* usb_config_desc;
struct usb_interface_descriptor* usb_if_desc;
struct usb_interface* usb_if;
int cfg_index, if_index, alt_index;
for (cfg_index = 0; cfg_index < xburst_dev->descriptor.bNumConfigurations; cfg_index++) {
usb_config_desc = &xburst_dev->config[cfg_index];
if (!usb_config_desc) {
fprintf(stderr, "Error - usb_config_desc NULL\n");
goto xout;
}
for (if_index = 0; if_index < usb_config_desc->bNumInterfaces; if_index++) {
usb_if = &usb_config_desc->interface[if_index];
if (!usb_if) {
fprintf(stderr, "Error - usb_if NULL\n");
goto xout;
}
for (alt_index = 0; alt_index < usb_if->num_altsetting; alt_index++) {
usb_if_desc = &usb_if->altsetting[alt_index];
if (!usb_if_desc) {
fprintf(stderr, "Error - usb_if_desc NULL\n");
goto xout;
}
if (usb_if_desc->bInterfaceClass == 0xFF
&& usb_if_desc->bInterfaceSubClass == 0) {
xburst_interface = usb_if_desc->bInterfaceNumber;
goto interface_found;
}
}
}
}
interface_found: ;
}
}
xburst_h = usb_open(xburst_dev);
if (!xburst_h) {
fprintf(stderr, "Error - can't open XBurst device: %s\n", usb_strerror());
goto xout;
}
if (usb_claim_interface(xburst_h, xburst_interface) < 0) {
fprintf(stderr, "Error - can't claim XBurst interface: %s\n", usb_strerror());
goto xout_xburst_h;
}
switch (request_type) {
case VR_GET_CPU_INFO: {
char cpu_info_buf[VR_GET_CPU_INFO_LEN+1] = {0};
usb_status = usb_control_msg(xburst_h,
/* requesttype */ USB_ENDPOINT_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
/* request */ VR_GET_CPU_INFO,
/* value */ 0,
/* index */ 0,
/* bytes */ cpu_info_buf,
/* size */ VR_GET_CPU_INFO_LEN,
/* timeout */ USB_TIMEOUT);
if (usb_status != VR_GET_CPU_INFO_LEN) {
fprintf(stderr, "Error - %s() returned %i\n", argv[1], usb_status);
goto xout_xburst_interface;
}
printf("VR_GET_CPU_INFO %s\n", cpu_info_buf);
break;
}
case VR_SET_DATA_ADDRESS:
case VR_SET_DATA_LENGTH:
case VR_PROGRAM_START1:
case VR_PROGRAM_START2: {
uint32_t u32_param;
if (argc != 3) {
fprintf(stderr, "Error - number of %s parameters %i\n", argv[1], argc);
goto xout_xburst_interface;
}
u32_param = strtoul(argv[2], 0 /* endptr */, 16 /* base */);
usb_status = usb_control_msg(xburst_h,
/* requesttype */ USB_ENDPOINT_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
/* request */ request_type,
/* value */ HIWORD(u32_param),
/* index */ LOWORD(u32_param),
/* bytes */ 0,
/* size */ 0,
/* timeout */ USB_TIMEOUT);
if (usb_status) {
fprintf(stderr, "Error - %s() returned %i\n", argv[1], usb_status);
goto xout_xburst_interface;
}
printf("%s %lxh\n", argv[1], (unsigned long) u32_param);
break;
}
case VR_FLUSH_CACHES: {
usb_status = usb_control_msg(xburst_h,
/* requesttype */ USB_ENDPOINT_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
/* request */ VR_FLUSH_CACHES,
/* value */ 0,
/* index */ 0,
/* bytes */ 0,
/* size */ 0,
/* timeout */ USB_TIMEOUT);
if (usb_status) {
fprintf(stderr, "Error - %s() returned %i\n", argv[1], usb_status);
goto xout_xburst_interface;
}
printf("VR_FLUSH_CACHES\n");
break;
}
case REQ_BULK_READ: {
int read_len;
char* read_buf;
if (argc != 3) {
fprintf(stderr, "Error - number of %s parameters %i\n", argv[1], argc);
goto xout_xburst_interface;
}
read_len = strtol(argv[2], 0 /* endptr */, 16 /* base */);
read_buf = (char*) malloc(read_len);
if (!read_buf) {
fprintf(stderr, "Error - cannot allocate %i bytes read buffer.\n", read_len);
goto xout_xburst_interface;
}
usb_status = usb_bulk_read(xburst_h,
/* endpoint */ INGENIC_IN_ENDPOINT,
/* bytes */ read_buf,
/* size */ read_len,
/* timeout */ USB_TIMEOUT);
if (usb_status > 0)
fwrite(read_buf, 1 /* size */, usb_status, stdout);
free(read_buf);
if (usb_status < read_len) {
fprintf(stderr, "Error reading %d bytes (result %i).\n", read_len, usb_status);
goto xout_xburst_interface;
}
break;
}
case REQ_BULK_WRITE: {
char* file_data;
int file_len;
FILE* file_h;
size_t num_read;
if (argc != 3) {
fprintf(stderr, "Error - number of parameters %i\n", argc);
goto xout_xburst_interface;
}
file_h = fopen(argv[2], "rb");
if (!file_h) {
fprintf(stderr, "Error opening %s.\n", argv[2]);
goto xout_xburst_interface;
}
if (fseek(file_h, 0, SEEK_END)) {
fprintf(stderr, "Error seeking to end of %s.\n", argv[2]);
fclose(file_h);
goto xout_xburst_interface;
}
file_len = ftell(file_h);
if (fseek(file_h, 0, SEEK_SET)) {
fprintf(stderr, "Error seeking to beginning of %s.\n", argv[2]);
fclose(file_h);
goto xout_xburst_interface;
}
file_data = (char*) malloc(file_len);
if (!file_data) {
fprintf(stderr, "Error allocating %d bytes data.\n", file_len);
fclose(file_h);
goto xout_xburst_interface;
}
num_read = fread(file_data, 1, file_len, file_h);
fclose(file_h);
if (num_read != (size_t) file_len) {
fprintf(stderr, "Error reading %d bytes (got %d).\n", file_len, num_read);
free(file_data);
goto xout_xburst_interface;
}
usb_status = usb_bulk_write(xburst_h,
/* endpoint */ INGENIC_OUT_ENDPOINT,
/* bytes */ file_data,
/* size */ file_len,
/* timeout */ USB_TIMEOUT);
free(file_data);
if (usb_status < file_len) {
fprintf(stderr, "Error writing %d bytes (result %i).\n", file_len, usb_status);
goto xout_xburst_interface;
}
printf("bulk_write successfully wrote %i bytes.\n", usb_status);
break;
}
}
usb_release_interface(xburst_h, xburst_interface);
usb_close(xburst_h);
return EXIT_SUCCESS;
xout_xburst_interface:
usb_release_interface(xburst_h, xburst_interface);
xout_xburst_h:
usb_close(xburst_h);
xout:
return EXIT_FAILURE;
}

8
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#!/bin/bash
../host-app/xbboot set_addr 80002000
../host-app/xbboot bulk_write ../target-stage1/stage1.bin
../host-app/xbboot start1 80002000
../host-app/xbboot set_addr 81c00000
../host-app/xbboot bulk_write ../target-echokernel/echo-kernel.bin
../host-app/xbboot flush_cache
../host-app/xbboot start2 81c00000

18
xbboot/target-common/common-types.h Normal file
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/*
* Authors: Xiangfu Liu <xiangfu@qi-hardware.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 3 of the License, or (at your option) any later version.
*/
#ifndef __COMMON_TYPES_H__
#define __COMMON_TYPES_H__
typedef unsigned int size_t;
typedef unsigned char u8;
typedef unsigned short u16;
typedef unsigned int u32;
#endif // __COMMON_TYPES_H__

4864
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65
xbboot/target-common/serial.c Normal file
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//
// Authors: Wolfgang Spraul <wolfgang@qi-hardware.com>
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public License
// as published by the Free Software Foundation; either version
// 3 of the License, or (at your option) any later version.
//
#include "serial.h"
#include "jz4740.h"
u32 UART_BASE;
void serial_putc(char c)
{
volatile u8* uart_lsr = (volatile u8*)(UART_BASE + OFF_LSR);
volatile u8* uart_tdr = (volatile u8*)(UART_BASE + OFF_TDR);
if (c == '\n') serial_putc ('\r');
/* Wait for fifo to shift out some bytes */
while ( !((*uart_lsr & (UART_LSR_TDRQ | UART_LSR_TEMT)) == 0x60) );
*uart_tdr = (u8) c;
}
void serial_puts(const char *s)
{
while (*s) serial_putc(*s++);
}
void serial_put_hex(unsigned int v)
{
unsigned char c[12];
char i;
for(i = 0; i < 8;i++)
{
c[i] = (v >> ((7 - i) * 4)) & 0xf;
if(c[i] < 10)
c[i] += 0x30;
else
c[i] += (0x41 - 10);
}
c[8] = '\n';
c[9] = 0;
serial_puts(c);
}
int serial_getc()
{
volatile u8* uart_rdr = (volatile u8*)(UART_BASE + OFF_RDR);
while (!serial_tstc());
return *uart_rdr;
}
int serial_tstc()
{
volatile u8* uart_lsr = (volatile u8*)(UART_BASE + OFF_LSR);
if (*uart_lsr & UART_LSR_DR) {
/* Data in rfifo */
return 1;
}
return 0;
}

18
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//
// Authors: Wolfgang Spraul <wolfgang@qi-hardware.com>
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public License
// as published by the Free Software Foundation; either version
// 3 of the License, or (at your option) any later version.
//
#include "common-types.h"
extern u32 UART_BASE;
void serial_putc(char c);
void serial_puts(const char *s);
void serial_put_hex(unsigned int v);
int serial_getc();
int serial_tstc();

11
xbboot/target-echokernel/.gitignore vendored Normal file
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echo-kernel.bin
echo-kernel.dump
echo-kernel.lst
echo-kernel.o
echo-kernel.sym
echo-kernel.map
echo-kernel.elf
head.lst
head.o
serial.lst
serial.o

53
xbboot/target-echokernel/Makefile Normal file
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#
# Authors: Wolfgang Spraul <wolfgang@qi-hardware.com>
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version
# 3 of the License, or (at your option) any later version.
#
ifeq ($(CROSS_COMPILE),)
$(error CROSS_COMPILE variable not set, should point to .../mipsel-openwrt-linux-)
endif
CC = $(CROSS_COMPILE)gcc
AR = $(CROSS_COMPILE)ar rcsv
LD = $(CROSS_COMPILE)ld
OBJCOPY = $(CROSS_COMPILE)objcopy
NM = $(CROSS_COMPILE)nm
OBJDUMP = $(CROSS_COMPILE)objdump
DEBUG_CFLAGS = -g -Wa,-a=$(basename $@).lst
# Wolfgang saw data corruptions in stage2 when dealing with ECC data on random writes
# to NAND. Disabling the unit-at-a-time optimization reproducibly fixed the bug.
# The compiler may be optimizing in a way that conflicts with how the hardware ECC
# registers work. Since other register accesses might be affected too it seems the best
# is to disable this optimization right now.
CFLAGS = -mips32 -O2 -fno-exceptions -fno-unit-at-a-time -fno-zero-initialized-in-bss \
-ffunction-sections -fomit-frame-pointer -msoft-float -G 0 $(DEBUG_CFLAGS)
LDFLAGS = -nostdlib -T target.ld $(CFLAGS)
LIBS = -lstdc++ -lc -lm -lgcc
VPATH = ../target-common
OBJS = echo-kernel.o serial.o
all: echo-kernel.elf
$(OBJCOPY) -O binary echo-kernel.elf echo-kernel.bin
$(OBJDUMP) -D echo-kernel.elf > echo-kernel.dump
$(NM) echo-kernel.elf | sort > echo-kernel.sym
$(OBJDUMP) -h echo-kernel.elf > echo-kernel.map
echo-kernel.elf: head.o $(OBJS)
$(CC) $(LDFLAGS) $^ -o $@
.c.o:
$(CC) $(CFLAGS) -o $@ -c $<
.cpp.o:
$(CC) $(CFLAGS) -fno-rtti -fvtable-gc -o $@ -c $<
.S.o:
$(CC) $(CFLAGS) -o $@ -c $<
clean:
rm -f $(addprefix echo-kernel., bin dump elf map sym)
rm -f head.o head.lst $(OBJS) $(OBJS:.o=.lst)

67
xbboot/target-echokernel/echo-kernel.c Normal file
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//
// Authors: Wolfgang Spraul <wolfgang@qi-hardware.com>
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public License
// as published by the Free Software Foundation; either version
// 3 of the License, or (at your option) any later version.
//
#include <inttypes.h>
#include "../target-common/jz4740.h"
#include "../target-common/serial.h"
void c_main();
void pre_main(void)
{
volatile unsigned int start_addr, got_start, got_end, addr, offset;
/* get absolute start address */
__asm__ __volatile__(
"move %0, $20\n\t"
: "=r"(start_addr)
:
);
/* get related GOT address */
__asm__ __volatile__(
"la $4, _GLOBAL_OFFSET_TABLE_\n\t"
"move %0, $4\n\t"
"la $5, _got_end\n\t"
"move %1, $5\n\t"
: "=r"(got_start),"=r"(got_end)
:
);
/* calculate offset and correct GOT*/
offset = start_addr - 0x80000000;
got_start += offset;
got_end += offset;
for ( addr = got_start + 8; addr < got_end; addr += 4 )
*((volatile unsigned int *)(addr)) += offset; // add offset to correct all GOT
// fw_args = (struct fw_args *)(start_addr + 0x8); //get the fw args from memory
UART_BASE = 0xB0030000;
serial_puts("Start address is:");
serial_put_hex(start_addr);
serial_puts("Address offset is:");
serial_put_hex(start_addr - 0x80000000);
serial_puts("GOT corrected to:");
serial_put_hex(got_start);
c_main();
}
void c_main()
{
// start infinite 'echo' kernel
while (1) {
if (serial_tstc()) {
int c = serial_getc();
serial_putc(c);
if (c == '\r')
serial_putc('\n');
}
}
}

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xbboot/target-echokernel/head.S Normal file
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//
// Authors: Wolfgang Spraul <wolfgang@qi-hardware.com>
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public License
// as published by the Free Software Foundation; either version
// 3 of the License, or (at your option) any later version.
//
.text
.extern pre_main
.globl _start
.set noreorder
_start:
b real_start
nop
.word 0x0 // its address == start address + 8
.word 0x0
.word 0x0
.word 0x0
.word 0x0
.word 0x0
.word 0x0
.word 0x0
real_start:
/* setup stack, jump to C code */
add $29, $20, 0x3ffff0 // sp locate at start address offset 0x2ffff0
add $25, $20, 0x40 // t9 = pre_main()
j $25
nop
.set reorder

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xbboot/target-echokernel/target.ld Normal file
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OUTPUT_ARCH(mips)
ENTRY(_start)
MEMORY
{
ram : ORIGIN = 0x80000000 , LENGTH = 3M
}
SECTIONS
{
. = ALIGN(4);
.text : { *(.text*) } > ram
. = ALIGN(4);
.rodata : { *(.rodata*) } > ram
. = ALIGN(4);
.sdata : { *(.sdata*) } > ram
. = ALIGN(4);
.data : { *(.data*) *(.scommon*) *(.reginfo*) } > ram
_gp = ALIGN(16);
.got : { *(.got*) } > ram
_got_end = ABSOLUTE(.);
. = ALIGN(4);
.sbss : { *(.sbss*) } > ram
.bss : { *(.bss*) } > ram
. = ALIGN (4);
}

8
xbboot/target-stage1/.gitignore vendored Normal file
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System.map
head.o
stage1.o
stage1.bin
stage1.dump
stage1.elf
stage1.map
serial.o

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xbboot/target-stage1/Makefile Normal file
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#
# Authors: Wolfgang Spraul <wolfgang@qi-hardware.com>
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version
# 3 of the License, or (at your option) any later version.
#
ifeq ($(CROSS_COMPILE),)
$(error CROSS_COMPILE variable not set, should point to .../mipsel-openwrt-linux-)
endif
CFLAGS = -O2 -fno-unit-at-a-time -fno-zero-initialized-in-bss -mips32 -fno-pic \
-mno-abicalls -I$(INFLASH_SRC_PATH) -I$(XBURST_INCLUDE_PATH)
LDFLAGS = -nostdlib -EL -T target.ld
VPATH = ../target-common
OBJS = head.o stage1.o serial.o
all: stage1.bin
stage1.bin: stage1.elf
$(CROSS_COMPILE)objcopy -O binary $< $@
$(CROSS_COMPILE)objdump -D $< > stage1.dump
$(CROSS_COMPILE)objdump -h $< > stage1.map
$(CROSS_COMPILE)nm -n $< > System.map
stage1.elf: $(OBJS)
$(CROSS_COMPILE)ld $(LDFLAGS) $(OBJS) -o $@
.c.o:
$(CROSS_COMPILE)gcc $(CFLAGS) -c $< -o $@
.S.o:
$(CROSS_COMPILE)gcc $(CFLAGS) -c $< -o $@
clean:
rm -f stage1.bin stage1.elf stage1.dump stage1.map
rm -f $(OBJS)
rm -f System.map

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xbboot/target-stage1/head.S Normal file
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//
// Authors: Wolfgang Spraul <wolfgang@qi-hardware.com>
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public License
// as published by the Free Software Foundation; either version
// 3 of the License, or (at your option) any later version.
//
.text
.extern c_main
.globl _start
.set noreorder
_start:
b real_start
nop
// 8 words for firmware parameters (0x80002008)
.word 0x0
.word 0x0
.word 0x0
.word 0x0
.word 0x0
.word 0x0
.word 0x0
.word 0x0
real_start:
la $29, 0x80004000 // setup stack (sp)
j c_main
nop
.set reorder

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xbboot/target-stage1/stage1.c Normal file
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//
// Authors: Wolfgang Spraul <wolfgang@qi-hardware.com>
//
// This program is free software; you can redistribute it and/or
// modify it under the terms of the GNU General Public License
// as published by the Free Software Foundation; either version
// 3 of the License, or (at your option) any later version.
//
#include <inttypes.h>
#include "../target-common/jz4740.h"
#include "../target-common/serial.h"
#define STAGE1_ARGS_ADDR 0x80002008
struct stage1_args {
// PLL
unsigned char ext_clk; // external crystal in MHz
unsigned char cpu_speed; // PLL output frequency=cpu_speed * ext_clk Mhz
unsigned char phm_div; // frequency divider ratio of PLL=CCLK:PCLK=HCLK=MCLK
// UART
unsigned char uart_num; // which UART to use (default: 0)
unsigned int uart_baud; // default: 57600
// SDRAM
unsigned char bus_width_16; // bus width of SDRAM is 16-bit (default is 32-bit)
unsigned char bank_addr_2bit; // 2-bit bank address width (=4 banks each chip select), default is 1-bit bank address=2 banks
unsigned char row_addr; // row address width in bits (11-13)
unsigned char col_addr; // column address width in bits (8-12)
} __attribute__((packed));
void load_args();
void gpio_init();
void pll_init();
void serial_init();
void sdram_init();
void c_main(void)
{
load_args();
gpio_init();
pll_init();
serial_init();
serial_puts("XBurst boot stage1...\n");
sdram_init();
serial_puts("stage 1 finished: GPIO, clocks, SDRAM, UART setup - now jump back to BOOT ROM...\n");
}
// tbd: do they have to be copied into globals? or just reference STAGE1_ARGS_ADDR?
volatile u32 ARG_EXTAL;
volatile u32 ARG_CPU_SPEED;
volatile u8 ARG_PHM_DIV;
volatile u32 ARG_UART_BASE;
volatile u32 ARG_UART_BAUD;
volatile u8 ARG_BUS_WIDTH_16;
volatile u8 ARG_BANK_ADDR_2BIT;
volatile u8 ARG_ROW_ADDR;
volatile u8 ARG_COL_ADDR;
void load_args()
{
struct stage1_args* args = (struct stage1_args*) STAGE1_ARGS_ADDR;
// NanoNote defaults
args->ext_clk = 12;
args->cpu_speed = 21;
args->phm_div = 3;
args->uart_num = 0;
args->uart_baud = 57600;
args->bus_width_16 = 1;
args->bank_addr_2bit = 1;
args->row_addr = 13;
args->col_addr = 9;
// END NanoNote defaults
ARG_EXTAL = args->ext_clk * 1000000;
ARG_CPU_SPEED = args->cpu_speed * ARG_EXTAL;
ARG_PHM_DIV = args->phm_div;
ARG_UART_BASE = UART0_BASE + args->uart_num * UART_OFF;
UART_BASE = ARG_UART_BASE; // for ../target-common/serial.c
ARG_UART_BAUD = args->uart_baud;
ARG_BUS_WIDTH_16 = args->bus_width_16;
ARG_BANK_ADDR_2BIT = args->bank_addr_2bit;
ARG_ROW_ADDR = args->row_addr;
ARG_COL_ADDR = args->col_addr;
}
void gpio_init()
{
__gpio_as_nand();
__gpio_as_sdram_32bit();
__gpio_as_uart0();
__gpio_as_uart1();
}
void pll_init()
{
register unsigned int cfcr, plcr1;
int n2FR[33] = {
0, 0, 1, 2, 3, 0, 4, 0, 5, 0, 0, 0, 6, 0, 0, 0,
7, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0,
9
};
/* int div[5] = {1, 4, 4, 4, 4}; */ /* divisors of I:S:P:L:M */
int nf, pllout2;
cfcr = CPM_CPCCR_CLKOEN |
(n2FR[1] << CPM_CPCCR_CDIV_BIT) |
(n2FR[ARG_PHM_DIV] << CPM_CPCCR_HDIV_BIT) |
(n2FR[ARG_PHM_DIV] << CPM_CPCCR_PDIV_BIT) |
(n2FR[ARG_PHM_DIV] << CPM_CPCCR_MDIV_BIT) |
(n2FR[ARG_PHM_DIV] << CPM_CPCCR_LDIV_BIT);
pllout2 = (cfcr & CPM_CPCCR_PCS) ? ARG_CPU_SPEED : (ARG_CPU_SPEED / 2);
/* Init UHC clock */
REG_CPM_UHCCDR = pllout2 / 48000000 - 1;
nf = ARG_CPU_SPEED * 2 / ARG_EXTAL;
plcr1 = ((nf - 2) << CPM_CPPCR_PLLM_BIT) | /* FD */
(0 << CPM_CPPCR_PLLN_BIT) | /* RD=0, NR=2 */
(0 << CPM_CPPCR_PLLOD_BIT) | /* OD=0, NO=1 */
(0x20 << CPM_CPPCR_PLLST_BIT) | /* PLL stable time */
CPM_CPPCR_PLLEN; /* enable PLL */
/* init PLL */
REG_CPM_CPCCR = cfcr;
REG_CPM_CPPCR = plcr1;
}
static void serial_setbaud()
{
volatile u8* uart_lcr = (volatile u8*)(ARG_UART_BASE + OFF_LCR);
volatile u8* uart_dlhr = (volatile u8*)(ARG_UART_BASE + OFF_DLHR);
volatile u8* uart_dllr = (volatile u8*)(ARG_UART_BASE + OFF_DLLR);
u32 baud_div, tmp;
baud_div = ARG_EXTAL / 16 / ARG_UART_BAUD;
tmp = *uart_lcr;
tmp |= UART_LCR_DLAB;
*uart_lcr = tmp;
*uart_dlhr = (baud_div >> 8) & 0xff;
*uart_dllr = baud_div & 0xff;
tmp &= ~UART_LCR_DLAB;
*uart_lcr = tmp;
}
void serial_init()
{
volatile u8* uart_fcr = (volatile u8*)(ARG_UART_BASE + OFF_FCR);
volatile u8* uart_lcr = (volatile u8*)(ARG_UART_BASE + OFF_LCR);
volatile u8* uart_ier = (volatile u8*)(ARG_UART_BASE + OFF_IER);
volatile u8* uart_sircr = (volatile u8*)(ARG_UART_BASE + OFF_SIRCR);
/* Disable port interrupts while changing hardware */
*uart_ier = 0;
/* Disable UART unit function */
*uart_fcr = ~UART_FCR_UUE;
/* Set both receiver and transmitter in UART mode (not SIR) */
*uart_sircr = ~(SIRCR_RSIRE | SIRCR_TSIRE);
/* Set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
*uart_lcr = UART_LCR_WLEN_8 | UART_LCR_STOP_1;
/* Set baud rate */
serial_setbaud();
/* Enable UART unit, enable and clear FIFO */
*uart_fcr = UART_FCR_UUE | UART_FCR_FE | UART_FCR_TFLS | UART_FCR_RFLS;
}
#define SDRAM_CASL 3 /* CAS latency: 2 or 3 */
// SDRAM Timings, unit: ns
#define SDRAM_TRAS 45 /* RAS# Active Time */
#define SDRAM_RCD 20 /* RAS# to CAS# Delay */
#define SDRAM_TPC 20 /* RAS# Precharge Time */
#define SDRAM_TRWL 7 /* Write Latency Time */
#define SDRAM_TREF 15625 /* Refresh period: 4096 refresh cycles/64ms */
void sdram_init()
{
register unsigned int dmcr0, dmcr, sdmode, tmp, cpu_clk, mem_clk, ns;
unsigned int cas_latency_sdmr[2] = {
EMC_SDMR_CAS_2,
EMC_SDMR_CAS_3,
};
unsigned int cas_latency_dmcr[2] = {
1 << EMC_DMCR_TCL_BIT, /* CAS latency is 2 */
2 << EMC_DMCR_TCL_BIT /* CAS latency is 3 */
};
int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
cpu_clk = ARG_CPU_SPEED;
mem_clk = cpu_clk * div[__cpm_get_cdiv()] / div[__cpm_get_mdiv()];
REG_EMC_BCR = 0; /* Disable bus release */
REG_EMC_RTCSR = 0; /* Disable clock for counting */
/* Fault DMCR value for mode register setting*/
dmcr0 = (ARG_BUS_WIDTH_16<<EMC_DMCR_BW_BIT) |
EMC_DMCR_EPIN |
cas_latency_dmcr[((SDRAM_CASL == 3) ? 1 : 0)];
/* Basic DMCR value */
dmcr = ((ARG_ROW_ADDR-11)<<EMC_DMCR_RA_BIT) |
((ARG_COL_ADDR-8)<<EMC_DMCR_CA_BIT) |
(ARG_BANK_ADDR_2BIT<<EMC_DMCR_BA_BIT) |
(ARG_BUS_WIDTH_16<<EMC_DMCR_BW_BIT) |
EMC_DMCR_EPIN |
cas_latency_dmcr[((SDRAM_CASL == 3) ? 1 : 0)];
/* SDRAM timimg */
ns = 1000000000 / mem_clk;
tmp = SDRAM_TRAS/ns;
if (tmp < 4) tmp = 4;
if (tmp > 11) tmp = 11;
dmcr |= ((tmp-4) << EMC_DMCR_TRAS_BIT);
tmp = SDRAM_RCD/ns;
if (tmp > 3) tmp = 3;
dmcr |= (tmp << EMC_DMCR_RCD_BIT);
tmp = SDRAM_TPC/ns;
if (tmp > 7) tmp = 7;
dmcr |= (tmp << EMC_DMCR_TPC_BIT);
tmp = SDRAM_TRWL/ns;
if (tmp > 3) tmp = 3;
dmcr |= (tmp << EMC_DMCR_TRWL_BIT);
tmp = (SDRAM_TRAS + SDRAM_TPC)/ns;
if (tmp > 14) tmp = 14;
dmcr |= (((tmp + 1) >> 1) << EMC_DMCR_TRC_BIT);
/* SDRAM mode value */
sdmode = EMC_SDMR_BT_SEQ |
EMC_SDMR_OM_NORMAL |
EMC_SDMR_BL_4 |
cas_latency_sdmr[((SDRAM_CASL == 3) ? 1 : 0)];
/* Stage 1. Precharge all banks by writing SDMR with DMCR.MRSET=0 */
REG_EMC_DMCR = dmcr;
REG8(EMC_SDMR0|sdmode) = 0;
/* Wait for precharge, > 200us */
tmp = (cpu_clk / 1000000) * 1000;
while (tmp--);
/* Stage 2. Enable auto-refresh */
REG_EMC_DMCR = dmcr | EMC_DMCR_RFSH;
tmp = SDRAM_TREF/ns;
tmp = tmp/64 + 1;
if (tmp > 0xff) tmp = 0xff;
REG_EMC_RTCOR = tmp;
REG_EMC_RTCNT = 0;
REG_EMC_RTCSR = EMC_RTCSR_CKS_64; /* Divisor is 64, CKO/64 */
/* Wait for number of auto-refresh cycles */
tmp = (cpu_clk / 1000000) * 1000;
while (tmp--);
/* Stage 3. Mode Register Set */
REG_EMC_DMCR = dmcr0 | EMC_DMCR_RFSH | EMC_DMCR_MRSET;
REG8(EMC_SDMR0|sdmode) = 0;
/* Set back to basic DMCR value */
REG_EMC_DMCR = dmcr | EMC_DMCR_RFSH | EMC_DMCR_MRSET;
/* everything is ok now */
}

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OUTPUT_ARCH(mips)
ENTRY(_start)
MEMORY
{
ram : ORIGIN = 0x80002000 , LENGTH = 0x100000
}
SECTIONS
{
. = ALIGN(4);
.text : { *(.text*) } > ram
. = ALIGN(4);
.rodata : { *(.rodata*) } > ram
. = ALIGN(4);
.sdata : { *(.sdata*) } > ram
. = ALIGN(4);
.data : { *(.data*) *(.scommon*) *(.reginfo*) } > ram
_gp = ABSOLUTE(.); /* Base of small data */
.got : { *(.got*) } > ram
. = ALIGN(4);
.sbss : { *(.sbss*) } > ram
.bss : { *(.bss*) } > ram
. = ALIGN (4);
}