mirror of
git://projects.qi-hardware.com/xburst-tools.git
synced 2024-11-01 18:22:28 +02:00
change the hand point
This commit is contained in:
parent
b47ed72723
commit
bb5f4be354
@ -29,28 +29,28 @@ int hand_init_def(struct hand *hand)
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{
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{
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/* nand flash info */
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/* nand flash info */
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/* hand.nand_start=0; */ /* important !!!! */
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/* hand.nand_start=0; */ /* important !!!! */
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(*hand).pt = JZ4740; /* cpu type */
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hand->pt = JZ4740; /* cpu type */
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(*hand).nand_bw = 8;
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hand->nand_bw = 8;
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(*hand).nand_rc = 3;
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hand->nand_rc = 3;
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(*hand).nand_ps = 2048;
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hand->nand_ps = 2048;
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(*hand).nand_ppb = 64;
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hand->nand_ppb = 64;
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(*hand).nand_eccpos = 6;
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hand->nand_eccpos = 6;
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(*hand).nand_bbpage = 0;
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hand->nand_bbpage = 0;
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(*hand).nand_bbpos = 0;
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hand->nand_bbpos = 0;
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(*hand).nand_force_erase = 0;
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hand->nand_force_erase = 0;
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/* hand.nand_ids=0; */ /* vendor_id & device_id */
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/* hand.nand_ids=0; */ /* vendor_id & device_id */
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(*hand).fw_args.cpu_id = 0x4740;
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hand->fw_args.cpu_id = 0x4740;
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(*hand).fw_args.ext_clk = 12;
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hand->fw_args.ext_clk = 12;
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(*hand).fw_args.cpu_speed = 225 / (*hand).fw_args.ext_clk;
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hand->fw_args.cpu_speed = 225 / hand->fw_args.ext_clk;
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(*hand).fw_args.phm_div = 3;
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hand->fw_args.phm_div = 3;
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(*hand).fw_args.use_uart = 0;
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hand->fw_args.use_uart = 0;
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(*hand).fw_args.boudrate = 57600;
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hand->fw_args.boudrate = 57600;
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(*hand).fw_args.bus_width = 0;
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hand->fw_args.bus_width = 0;
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(*hand).fw_args.bank_num = 1;
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hand->fw_args.bank_num = 1;
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(*hand).fw_args.row_addr = 13;
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hand->fw_args.row_addr = 13;
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(*hand).fw_args.col_addr = 9;
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hand->fw_args.col_addr = 9;
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(*hand).fw_args.is_mobile = 0;
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hand->fw_args.is_mobile = 0;
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(*hand).fw_args.is_busshare = 1;
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hand->fw_args.is_busshare = 1;
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return 1;
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return 1;
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}
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}
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@ -59,73 +59,73 @@ int check_dump_cfg(struct hand *hand)
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{
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{
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printf("\n Now checking whether all configure args valid: ");
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printf("\n Now checking whether all configure args valid: ");
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/* check PLL */
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/* check PLL */
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if ((*hand).fw_args.ext_clk > 27 || (*hand).fw_args.ext_clk < 12) {
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if (hand->fw_args.ext_clk > 27 || hand->fw_args.ext_clk < 12) {
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printf("\n EXTCLK setting invalid!");
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printf("\n EXTCLK setting invalid!");
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return 0;
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return 0;
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}
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}
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if ((*hand).fw_args.phm_div > 32 || (*hand).fw_args.ext_clk < 2) {
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if (hand->fw_args.phm_div > 32 || hand->fw_args.ext_clk < 2) {
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printf("\n PHMDIV setting invalid!");
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printf("\n PHMDIV setting invalid!");
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return 0;
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return 0;
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}
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}
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if (((*hand).fw_args.cpu_speed * (*hand).fw_args.ext_clk ) % 12 != 0) {
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if ((hand->fw_args.cpu_speed * hand->fw_args.ext_clk ) % 12 != 0) {
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printf("\n CPUSPEED setting invalid!");
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printf("\n CPUSPEED setting invalid!");
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return 0;
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return 0;
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}
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}
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/* check SDRAM */
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/* check SDRAM */
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if ((*hand).fw_args.bus_width > 1 ) {
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if (hand->fw_args.bus_width > 1 ) {
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printf("\n SDRAMWIDTH setting invalid!");
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printf("\n SDRAMWIDTH setting invalid!");
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return 0;
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return 0;
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}
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}
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if ((*hand).fw_args.bank_num > 1 ) {
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if (hand->fw_args.bank_num > 1 ) {
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printf("\n BANKNUM setting invalid!");
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printf("\n BANKNUM setting invalid!");
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return 0;
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return 0;
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}
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}
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if ((*hand).fw_args.row_addr > 13 && (*hand).fw_args.row_addr < 11 ) {
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if (hand->fw_args.row_addr > 13 && hand->fw_args.row_addr < 11 ) {
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printf("\n ROWADDR setting invalid!");
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printf("\n ROWADDR setting invalid!");
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return 0;
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return 0;
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}
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}
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if ((*hand).fw_args.col_addr > 13 && (*hand).fw_args.col_addr < 11 ) {
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if (hand->fw_args.col_addr > 13 && hand->fw_args.col_addr < 11 ) {
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printf("\n COLADDR setting invalid!");
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printf("\n COLADDR setting invalid!");
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return 0;
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return 0;
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}
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}
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/* check NAND */
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/* check NAND */
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if ( (*hand).nand_ps < 2048 && (*hand).nand_os > 16 ) {
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if ( hand->nand_ps < 2048 && hand->nand_os > 16 ) {
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printf("\n PAGESIZE or OOBSIZE setting invalid!");
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printf("\n PAGESIZE or OOBSIZE setting invalid!");
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return 0;
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return 0;
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}
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}
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if ( (*hand).nand_ps < 2048 && (*hand).nand_ppb > 32 ) {
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if ( hand->nand_ps < 2048 && hand->nand_ppb > 32 ) {
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printf("\n PAGESIZE or PAGEPERBLOCK setting invalid!");
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printf("\n PAGESIZE or PAGEPERBLOCK setting invalid!");
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return 0;
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return 0;
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}
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}
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if ( (*hand).nand_ps > 512 && (*hand).nand_os <= 16 ) {
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if ( hand->nand_ps > 512 && hand->nand_os <= 16 ) {
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printf("\n PAGESIZE or OOBSIZE setting invalid!");
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printf("\n PAGESIZE or OOBSIZE setting invalid!");
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return 0;
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return 0;
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}
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}
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if ( (*hand).nand_ps > 512 && (*hand).nand_ppb < 64 ) {
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if ( hand->nand_ps > 512 && hand->nand_ppb < 64 ) {
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printf("\n PAGESIZE or PAGEPERBLOCK setting invalid!");
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printf("\n PAGESIZE or PAGEPERBLOCK setting invalid!");
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return 0;
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return 0;
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}
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}
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printf("\n Current device information:");
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printf("\n Current device information:");
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printf(" CPU is Jz%x",(*hand).fw_args.cpu_id);
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printf(" CPU is Jz%x",hand->fw_args.cpu_id);
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printf("\n Crystal work at %dMHz, the CCLK up to %dMHz and PMH_CLK up to %dMHz",
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printf("\n Crystal work at %dMHz, the CCLK up to %dMHz and PMH_CLK up to %dMHz",
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(*hand).fw_args.ext_clk,
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hand->fw_args.ext_clk,
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(unsigned int)(*hand).fw_args.cpu_speed * (*hand).fw_args.ext_clk,
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(unsigned int)hand->fw_args.cpu_speed * hand->fw_args.ext_clk,
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((unsigned int)(*hand).fw_args.cpu_speed * (*hand).fw_args.ext_clk) / (*hand).fw_args.phm_div);
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((unsigned int)hand->fw_args.cpu_speed * hand->fw_args.ext_clk) / hand->fw_args.phm_div);
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printf("\n Total SDRAM size is %d MB, work in %d bank and %d bit mode",
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printf("\n Total SDRAM size is %d MB, work in %d bank and %d bit mode",
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total_size / 0x100000, 2 * ((*hand).fw_args.bank_num + 1),
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total_size / 0x100000, 2 * (hand->fw_args.bank_num + 1),
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16 * (2 - (*hand).fw_args.bus_width));
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16 * (2 - hand->fw_args.bus_width));
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/* printf("\n Nand page size %d, ECC offset %d, ",
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/* printf("\n Nand page size %d, ECC offset %d, ",
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(*hand).nand_ps,(*hand).nand_eccpos);
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hand->nand_ps,hand->nand_eccpos);
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printf("bad block ID %d, ",(*hand).nand_bbpage);
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printf("bad block ID %d, ",hand->nand_bbpage);
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printf("use %d plane mode",(*hand).nand_plane); */
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printf("use %d plane mode",hand->nand_plane); */
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printf("\n");
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printf("\n");
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return 1;
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return 1;
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@ -136,37 +136,37 @@ int parse_configure(struct hand *hand, char * file_path)
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hand_init_def(hand);
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hand_init_def(hand);
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cfg_opt_t opts[] = {
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cfg_opt_t opts[] = {
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CFG_SIMPLE_INT("EXTCLK", &(*hand).fw_args.ext_clk),
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CFG_SIMPLE_INT("EXTCLK", &hand->fw_args.ext_clk),
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CFG_SIMPLE_INT("CPUSPEED", &(*hand).fw_args.cpu_speed),
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CFG_SIMPLE_INT("CPUSPEED", &hand->fw_args.cpu_speed),
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CFG_SIMPLE_INT("PHMDIV", &(*hand).fw_args.phm_div),
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CFG_SIMPLE_INT("PHMDIV", &hand->fw_args.phm_div),
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CFG_SIMPLE_INT("BOUDRATE", &(*hand).fw_args.boudrate),
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CFG_SIMPLE_INT("BOUDRATE", &hand->fw_args.boudrate),
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CFG_SIMPLE_INT("USEUART", &(*hand).fw_args.use_uart),
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CFG_SIMPLE_INT("USEUART", &hand->fw_args.use_uart),
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CFG_SIMPLE_INT("BUSWIDTH", &(*hand).fw_args.bus_width),
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CFG_SIMPLE_INT("BUSWIDTH", &hand->fw_args.bus_width),
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CFG_SIMPLE_INT("BANKS", &(*hand).fw_args.bank_num),
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CFG_SIMPLE_INT("BANKS", &hand->fw_args.bank_num),
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CFG_SIMPLE_INT("ROWADDR", &(*hand).fw_args.row_addr),
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CFG_SIMPLE_INT("ROWADDR", &hand->fw_args.row_addr),
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CFG_SIMPLE_INT("COLADDR", &(*hand).fw_args.col_addr),
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CFG_SIMPLE_INT("COLADDR", &hand->fw_args.col_addr),
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CFG_SIMPLE_INT("ISMOBILE", &(*hand).fw_args.is_mobile),
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CFG_SIMPLE_INT("ISMOBILE", &hand->fw_args.is_mobile),
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CFG_SIMPLE_INT("ISBUSSHARE", &(*hand).fw_args.is_busshare),
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CFG_SIMPLE_INT("ISBUSSHARE", &hand->fw_args.is_busshare),
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CFG_SIMPLE_INT("DEBUGOPS", &(*hand).fw_args.debug_ops),
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CFG_SIMPLE_INT("DEBUGOPS", &hand->fw_args.debug_ops),
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CFG_SIMPLE_INT("PINNUM", &(*hand).fw_args.pin_num),
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CFG_SIMPLE_INT("PINNUM", &hand->fw_args.pin_num),
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CFG_SIMPLE_INT("START", &(*hand).fw_args.start),
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CFG_SIMPLE_INT("START", &hand->fw_args.start),
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CFG_SIMPLE_INT("SIZE", &(*hand).fw_args.size),
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CFG_SIMPLE_INT("SIZE", &hand->fw_args.size),
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CFG_SIMPLE_INT("NAND_BUSWIDTH", &(*hand).nand_bw),
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CFG_SIMPLE_INT("NAND_BUSWIDTH", &hand->nand_bw),
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CFG_SIMPLE_INT("NAND_ROWCYCLES", &(*hand).nand_rc),
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CFG_SIMPLE_INT("NAND_ROWCYCLES", &hand->nand_rc),
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CFG_SIMPLE_INT("NAND_PAGESIZE", &(*hand).nand_ps),
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CFG_SIMPLE_INT("NAND_PAGESIZE", &hand->nand_ps),
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CFG_SIMPLE_INT("NAND_PAGEPERBLOCK", &(*hand).nand_ppb),
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CFG_SIMPLE_INT("NAND_PAGEPERBLOCK", &hand->nand_ppb),
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CFG_SIMPLE_INT("NAND_FORCEERASE", &(*hand).nand_force_erase),
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CFG_SIMPLE_INT("NAND_FORCEERASE", &hand->nand_force_erase),
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CFG_SIMPLE_INT("NAND_OOBSIZE", &(*hand).nand_os),
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CFG_SIMPLE_INT("NAND_OOBSIZE", &hand->nand_os),
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CFG_SIMPLE_INT("NAND_ECCPOS", &(*hand).nand_eccpos),
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CFG_SIMPLE_INT("NAND_ECCPOS", &hand->nand_eccpos),
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CFG_SIMPLE_INT("NAND_BADBLACKPOS", &(*hand).nand_bbpos),
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CFG_SIMPLE_INT("NAND_BADBLACKPOS", &hand->nand_bbpos),
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CFG_SIMPLE_INT("NAND_BADBLACKPAGE", &(*hand).nand_bbpage),
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CFG_SIMPLE_INT("NAND_BADBLACKPAGE", &hand->nand_bbpage),
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CFG_SIMPLE_INT("NAND_PLANENUM", &(*hand).nand_plane),
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CFG_SIMPLE_INT("NAND_PLANENUM", &hand->nand_plane),
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CFG_SIMPLE_INT("NAND_BCHBIT", &(*hand).nand_bchbit),
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CFG_SIMPLE_INT("NAND_BCHBIT", &hand->nand_bchbit),
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CFG_SIMPLE_INT("NAND_WPPIN", &(*hand).nand_wppin),
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CFG_SIMPLE_INT("NAND_WPPIN", &hand->nand_wppin),
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CFG_SIMPLE_INT("NAND_BLOCKPERCHIP", &(*hand).nand_bbpage),
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CFG_SIMPLE_INT("NAND_BLOCKPERCHIP", &hand->nand_bbpage),
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CFG_END()
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CFG_END()
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};
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};
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@ -177,18 +177,18 @@ int parse_configure(struct hand *hand, char * file_path)
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return -1;
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return -1;
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cfg_free(cfg);
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cfg_free(cfg);
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(*hand).fw_args.cpu_id = 0x4740;
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hand->fw_args.cpu_id = 0x4740;
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if ((*hand).fw_args.bus_width == 32)
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if (hand->fw_args.bus_width == 32)
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(*hand).fw_args.bus_width = 0 ;
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hand->fw_args.bus_width = 0 ;
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else
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else
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(*hand).fw_args.bus_width = 1 ;
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hand->fw_args.bus_width = 1 ;
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(*hand).fw_args.bank_num = (*hand).fw_args.bank_num / 4;
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hand->fw_args.bank_num = hand->fw_args.bank_num / 4;
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(*hand).fw_args.cpu_speed = (*hand).fw_args.cpu_speed / (*hand).fw_args.ext_clk;
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hand->fw_args.cpu_speed = hand->fw_args.cpu_speed / hand->fw_args.ext_clk;
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total_size = (unsigned int)
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total_size = (unsigned int)
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(2 << ((*hand).fw_args.row_addr + (*hand).fw_args.col_addr - 1)) * 2
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(2 << (hand->fw_args.row_addr + hand->fw_args.col_addr - 1)) * 2
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* ((*hand).fw_args.bank_num + 1) * 2
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* (hand->fw_args.bank_num + 1) * 2
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* (2 - (*hand).fw_args.bus_width);
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* (2 - hand->fw_args.bus_width);
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if (check_dump_cfg(hand) < 1)
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if (check_dump_cfg(hand) < 1)
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return -1;
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return -1;
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