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qi-gta03-priority.patch
Prefer GTA03, enable dual mDDR init (killing SMDK compatability for now) fix bugs in GPIO register offsets, set loglevel=8 for GTA03 Signed-off-by: Andy Green <andy@openmoko.com>
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@ -33,7 +33,7 @@
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#define CONFIG_S3C6410 1
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#endif
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#define S3C64XX_UART_CHANNELS 3
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#define S3C64XX_UART_CHANNELS 4
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#define S3C64XX_SPI_CHANNELS 2
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#define HSMMC_CHANNEL 0
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@ -326,9 +326,9 @@ typedef enum {
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#define GPACONSLP_OFFSET 0x0C
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#define GPAPUDSLP_OFFSET 0x10
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#define GPBCON_OFFSET 0x20
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#define GPBDAT_OFFSET 0x04
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#define GPBPUD_OFFSET 0x08
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#define GPBCONSLP_OFFSET 0x0C
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#define GPBDAT_OFFSET 0x24
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#define GPBPUD_OFFSET 0x28
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#define GPBCONSLP_OFFSET 0x2C
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#define GPBPUDSLP_OFFSET 0x30
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#define GPCCON_OFFSET 0x40
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#define GPCDAT_OFFSET 0x44
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@ -1133,13 +1133,6 @@ typedef enum {
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#define ELFIN_UART1_OFFSET 0x0400
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#define ELFIN_UART2_OFFSET 0x0800
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#ifdef CONFIG_SERIAL1
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#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART0_OFFSET)
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#elif defined(CONFIG_SERIAL2)
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#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART1_OFFSET)
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#else
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#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART0_OFFSET)
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#endif
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#define ULCON_OFFSET 0x00
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#define UCON_OFFSET 0x04
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@ -53,7 +53,7 @@ const struct board_api board_api_smdk6410 = {
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.partition_index = 2,
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.filepath = "boot/uImage.bin",
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.commandline = "console=ttySAC0,115200 " \
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"loglevel=8 init=/bin/sh " \
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"loglevel=3 init=/bin/sh " \
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"root=/dev/mmcblk0p2 rootfstype=ext3"
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},
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[1] = {
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@ -27,7 +27,7 @@
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#define TEXT_BASE 0x53000000
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#define S3C6410_POP_A 0
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#define S3C6410_POP_A 1
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#define set_pll(mdiv, pdiv, sdiv) (1<<31 | mdiv<<16 | pdiv<<8 | sdiv)
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@ -34,8 +34,8 @@
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extern void bootloader_second_phase(void);
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const struct board_api *boards[] = {
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&board_api_smdk6410,
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&board_api_gta03,
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&board_api_smdk6410,
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NULL /* always last */
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};
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