Merge branch 'master' of git@projects.qi-hardware.com:xburst-tools

Makefile

@@ -1,73 +0,0 @@
-# "PanGu Makefile" - for setting up the PanGu development environment
-#
-# Copyright 2009 (C) Qi Hardware inc.,
-# Author: Xiangfu Liu <xiangfu@qi-hardware.com>
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# version 3 as published by the Free Software Foundation.
-
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor,
-# Boston, MA  02110-1301, USA
-
-# for the device stage
-FLASH_TOOL_PATH = ./usbboot
-STAGE1_PATH = $(FLASH_TOOL_PATH)/xburst_stage1
-STAGE2_PATH = $(FLASH_TOOL_PATH)/xburst_stage2
-CROSS_COMPILE ?= mipsel-openwrt-linux-
-
-CFLAGS="-O2"
-
-### u-boot
-.PHONY: u-boot
-u-boot:
-	git clone git://github.com/xiangfu/qi-u-boot.git u-boot
-	cd u-boot && \
-	make qi_lb60_config && \
-	make
-
-### kernel
-.PHONY: kernel
-kernel:
-	git clone git://github.com/xiangfu/qi-kernel.git kernel
-	cd kernel && \
-	make pi_defconfig && \
-	make uImage
-
-### flash-boot
-.PHONY: usbboot
-usbboot: stage1 stage2
-	cd $(FLASH_TOOL_PATH)
-	./autogen.sh && \
-	./configure && \
-	make
-
-stage1:
-	make CROSS_COMPILE=$(CROSS_COMPILE) -C $(STAGE1_PATH)
-
-stage2:
-	make CROSS_COMPILE=$(CROSS_COMPILE) -C $(STAGE2_PATH)
-
-### clean up
-distclean: clean clean-usbboot
-
-clean:
-
-clean-usbboot:
-	make clean CROSS_COMPILE=$(CROSS_COMPILE) -C $(STAGE1_PATH)
-	make clean CROSS_COMPILE=$(CROSS_COMPILE) -C $(STAGE2_PATH)
-	make clean -C $(FLASH_TOOL_PATH)
-
-help:
-	@make --print-data-base --question |	\
-	awk '/^[^.%][-A-Za-z0-9_]*:/		\
-	{ print substr($$1, 1, length($$1)-1) }' | 	\
-	sort |	\
-	pr --omit-pagination --width=80 --columns=1

README

@@ -1,73 +0,0 @@
-Prepare for Reflash Device 
---------------------
-=serial console=
-  at the back of Ben Nanonote, there is "GND", "TXD" and "RXD", 
-  you can get serial output from those pins 
-  you need a TTL <-> RS232 converter. because the Ben Nanonote serial 
-  console is TTL. here[1] is the serial PIN in the board.
-
-=toolchain=
-    $ git clone git://github.com/lindnermarek/openwrt-x-burst.git[2]
-    $ git checkout --track -b x-burst origin/x-burst
-    $ make menuconfig
-         (select 'XBurst JZ47x0 [2.6]' in 'Target System')
-    $ make
-  then you will get toolchain under /PATH/TO/openwrt-x-burst/staging_dir/
-  toolchain-mipsel_gcc-4.1.2_uClibc-0.9.30.1/usr/bin
-
-=xburst-tools (usbboot tools)=
-  you can get source code at git://github.com/xiangfu/xburst-tools.git[3]
-    $ cd /PATH/TO/xburst-tools/usbboot
-    $ ./autogen.sh && ./configure && make && sudo make install
-  then you got the 'usbboot' command. that is for the reflash.
-
-=u-boot=
-  in openWRT menuconfig-->Target Images-->Build U-Boot bootloader -->
-  U-Boot target board (NEW) --> input 'qi_lb60
-  
-  here[4] is the u-boot github URL
-    $ make qi_lb60_config
-    $ make 
-  there is 'u-boot-nand.bin' is for Ben
-
-
-How To Reflash
---------------------
-1. plug the Ben to your computer. direct connect. no usb hub.
-2. short the two pin ('boot from usb' show in [1])
-3. press 'RESET' at the back of Ben
-4. in you computer run [5] and [6]. then you flashed the bootloader and kernel
-   to nand flash. 
-5. rootfs: format your SD card. 
-   the first partition must VFAT and others is EXT2.
-   we can put the kernel(uImage) in the first partition. put the rootfs in second partition.
-   uncompress openwrt rootfs to second partition of SD card
-6. now you can boot your Ben.
-
-----
-[1] http://www.openmobilefree.net/?p=61
-[2] here is the web site
-http://github.com/lindnermarek/openwrt-x-burst/commits/x-burst
-     now we put the code in github.com
-[3] in folder 'usbboot', here is the tar package and Debian package.
-     http://cloud.github.com/downloads/xiangfu/xburst-tools/xburst-tools_0.0_200906.tar.gz
-     http://cloud.github.com/downloads/xiangfu/xburst-tools/xburst-tools_0.0_200906-1_i386.deb
-[4] http://github.com/xiangfu/qi-u-boot/tree
-     [master] is the last u-boot.
-     command: "mmc init;fatload mmc 0 0x80600000 uImage;bootm" is for boot the kernel in sd card.
-[5] flash.u-boot.sh
---------
-#!/bin/bash
-U_BOOT=/PATH/TO/u-boot-nand.bin
-sudo ../usbboot/src/usbboot -c "\
-boot;\
-nprog 0 $U_BOOT 0 0 -n"
-
-[6] flash.kernel.sh
-----------
-#!/bin/bash
-START_PAGE=2048
-KERNEL=/PATH/TO/KERNEL_UIMAGE
-sudo usbboot -c "boot"
-sudo usbboot -c "nprog $START_PAGE $KERNEL  0 0 -n"
-

usbboot/configure.ac

@@ -22,7 +22,7 @@ exit -1 ])
 AC_CHECK_LIB([gcc], [main])
 AC_CHECK_LIB([m], [main])
 AC_CHECK_LIB([usb], [main], [], [
-echo "Error! You need to have libconfuse. \n"
+echo "Error! You need to have libusb. \n"
 echo "Maybe run 'sudo apt-get install libusb-dev' under debian"
 exit -1 ])
 

usbboot/debian/copyright

@@ -21,11 +21,11 @@ The Debian packaging is copyright 2009,
 	MIPS Technologies, Inc.
 	Maciej W. Rozycki
 	Lucifer at Ingenic Semiconductor Inc.
-is licensed under the GPL, see `/usr/share/common-licenses/GPL'.
+is licensed under the GPL, see `/usr/share/common-licenses/GPL-3'.
 
 You are free to distribute this software under the terms of
 the GNU General Public License  either version 3 of the License,
 or (at your option) any later version.
 On Debian systems, the complete text of the GNU General Public
-License can be found in the file `/usr/share/common-licenses/GPL'.
+License can be found in the file `/usr/share/common-licenses/GPL-3'.
 

usbboot/debian/rules

@@ -33,7 +33,7 @@ endif
 ifneq "$(wildcard /usr/share/misc/config.guess)" ""
 	cp -f /usr/share/misc/config.guess config.guess
 endif
-	./configure $(CROSS) --prefix=/usr --mandir=\$${prefix}/share/man --infodir=\$${prefix}/share/info CFLAGS="$(CFLAGS)" LDFLAGS="-Wl,-z,defs"
+	./configure $(CROSS) --prefix=/usr --sysconfdir=/etc --mandir=\$${prefix}/share/man --infodir=\$${prefix}/share/info CFLAGS="$(CFLAGS)" LDFLAGS="-Wl,-z,defs"
 
 
 build: build-stamp

usbboot/src/Makefile.am

@@ -1,4 +1,4 @@
-AM_CFLAGS = -pedantic -Wall -W -O1 -g3 -std=gnu99 -lusb -lconfuse
+AM_CFLAGS = -pedantic -Wall -W -O1 -g3 -std=gnu99 -lusb -lconfuse -DCFGDIR=\"$(cfgdir)\"
 
 xburst-tools_version.h:
 	echo -e '#ifndef XBURST_TOOLS_VERSION' \
@@ -10,15 +10,14 @@ bin_PROGRAMS = usbboot
 usbboot_SOURCES = cmd.c  command_line.c  ingenic_cfg.c  \
 	ingenic_usb.c  main.c
 
-prefix = /usr
+pkgdatadir = $(datadir)/xburst-tools
-datadir = /usr/share/xburst-tools
+pkgdata_DATA = ../xburst_stage1/xburst_stage1.bin \
-data_DATA = ../xburst_stage1/xburst_stage1.bin \
 	../xburst_stage2/xburst_stage2.bin
 
-cfgdir = /etc/xburst-tools
+cfgdir = $(sysconfdir)/xburst-tools
 cfg_DATA = ../doc/usbboot.cfg
 
-EXTRA_DIST = $(datadir) $(cfgdir)
+EXTRA_DIST = $(pkgdatadir) $(cfgdir)
 
 ../xburst_stage1/xburst_stage1.bin:
 	$(MAKE) CROSS_COMPILE=mipsel-openwrt-linux- -C ../xburst_stage1

usbboot/src/cmd.c

@@ -222,12 +222,14 @@ int nand_program_check(struct nand_in *nand_in,
 		       unsigned int *start_page)
 {
 	unsigned int i, page_num, cur_page = -1;
+	unsigned int start_addr;
 	unsigned short temp;
+	int status = -1;
 
 	printf(" Writing NAND page %d len %d...\n", nand_in->start, nand_in->length);
 	if (nand_in->length > (unsigned int)MAX_TRANSFER_SIZE) {
 		printf(" Buffer size too long!\n");
-		return -1;
+		goto err;
 	}
 
 #ifdef CONFIG_NAND_OUT
@@ -237,10 +239,12 @@ int nand_program_check(struct nand_in *nand_in,
 		(nand_out->status)[i] = 0; /* set all status to fail */
 #endif
 
-	if (usb_get_ingenic_cpu(&ingenic_dev) < 3) {
+	int cpu = usb_get_ingenic_cpu(&ingenic_dev);
+	if (cpu != BOOT4740 && cpu != BOOT4750) {
 		printf(" Device unboot! Boot it first!\n");
-		return -1;
+		goto err;
 	}
+
 	ingenic_dev.file_buff = nand_in->buf;
 	ingenic_dev.file_len = nand_in->length;
 	usb_send_data_to_ingenic(&ingenic_dev);
@@ -259,50 +263,47 @@ int nand_program_check(struct nand_in *nand_in,
 		}
 		temp = ((nand_in->option << 12) & 0xf000)  + 
 			((i<<4) & 0xff0) + NAND_PROGRAM;	
-		usb_send_data_address_to_ingenic(&ingenic_dev, nand_in->start);
+		if (usb_send_data_address_to_ingenic(&ingenic_dev, nand_in->start) != 1)
-		usb_send_data_length_to_ingenic(&ingenic_dev, page_num);
+			goto err;
-		usb_ingenic_nand_ops(&ingenic_dev, temp);
+		if (usb_send_data_length_to_ingenic(&ingenic_dev, page_num) != 1)
+			goto err;
+		if (usb_ingenic_nand_ops(&ingenic_dev, temp) != 1)
+			goto err;
+		if (usb_read_data_from_ingenic(&ingenic_dev, ret, 8) != 1)
+			goto err;
 
-		usb_read_data_from_ingenic(&ingenic_dev, ret, 8);
 		printf(" Finish! (len %d start_page %d page_num %d)\n", 
 		       nand_in->length, nand_in->start, page_num);
 
-		usb_send_data_address_to_ingenic(&ingenic_dev, nand_in->start);
 		/* Read back to check! */
+		usb_send_data_address_to_ingenic(&ingenic_dev, nand_in->start);
 		usb_send_data_length_to_ingenic(&ingenic_dev, page_num);
 
 		switch (nand_in->option) {
 		case OOB_ECC:
 			temp = ((OOB_ECC << 12) & 0xf000) +
 				((i << 4) & 0xff0) + NAND_READ;
-			usb_ingenic_nand_ops(&ingenic_dev, temp);
+			start_addr = page_num * (hand.nand_ps + hand.nand_os);
-			printf(" Checking %d bytes...", nand_in->length);
-			usb_read_data_from_ingenic(&ingenic_dev, check_buf, 
-						   page_num * (hand.nand_ps + hand.nand_os));
-			usb_read_data_from_ingenic(&ingenic_dev, ret, 8);
 			break;
 		case OOB_NO_ECC:	/* do not support data verify */
 			temp = ((OOB_NO_ECC << 12) & 0xf000) + 
 				((i << 4) & 0xff0) + NAND_READ;
-			usb_ingenic_nand_ops(&ingenic_dev, temp);
+			start_addr = page_num * (hand.nand_ps + hand.nand_os);
-			printf(" Checking %d bytes...", nand_in->length);
-			usb_read_data_from_ingenic(&ingenic_dev, check_buf, 
-						   page_num * (hand.nand_ps + hand.nand_os));
-			usb_read_data_from_ingenic(&ingenic_dev, ret, 8);
 			break;
 		case NO_OOB:
 			temp = ((NO_OOB << 12) & 0xf000) + 
 				((i << 4) & 0xff0) + NAND_READ;
-			usb_ingenic_nand_ops(&ingenic_dev, temp);
+			start_addr = page_num * hand.nand_ps;
-			printf(" Checking %d bytes...", nand_in->length);
-			usb_read_data_from_ingenic(&ingenic_dev, check_buf, 
-						   page_num * hand.nand_ps);
-			usb_read_data_from_ingenic(&ingenic_dev, ret, 8);
 			break;
 		default:
 			;
 		}
 
+		printf(" Checking %d bytes...", nand_in->length);
+		usb_ingenic_nand_ops(&ingenic_dev, temp);
+		usb_read_data_from_ingenic(&ingenic_dev, check_buf, start_addr);
+		usb_read_data_from_ingenic(&ingenic_dev, ret, 8);
+
 		cur_page = (ret[3] << 24) | (ret[2] << 16) |  (ret[1] << 8) | 
 			(ret[0] << 0);
 
@@ -333,7 +334,10 @@ int nand_program_check(struct nand_in *nand_in,
 	}
 
 	*start_page = cur_page;
-	return 0;
+
+	status = 1;
+err:
+	return status;
 }
 
 int nand_erase(struct nand_in *nand_in)
@@ -551,6 +555,7 @@ int init_nand_in(void)
 
 int nand_prog(void)
 {
+	int status = -1;
 	char *image_file;
 	char *help = " Usage: nprog (1) (2) (3) (4) (5)\n"
 		" (1)\tstart page number\n"
@@ -595,7 +600,9 @@ int nand_prog(void)
 		printf(" %d", (nand_out.status)[i]);
 #endif
 
-	return 1;
+	status = 1;
+err:
+	return status;
 }
 
 int nand_query(void)

usbboot/src/ingenic_usb.c

@@ -166,12 +166,12 @@ int usb_get_ingenic_cpu(struct ingenic_dev *ingenic_dev)
 	ingenic_dev->cpu_info_buff[8] = '\0';
 	printf(" CPU data: %s\n", ingenic_dev->cpu_info_buff);
 
-	if (!strcmp(ingenic_dev->cpu_info_buff,"JZ4740V1")) return 1;
+	if (!strcmp(ingenic_dev->cpu_info_buff,"JZ4740V1")) return JZ4740V1;
-	if (!strcmp(ingenic_dev->cpu_info_buff,"JZ4750V1")) return 2;
+	if (!strcmp(ingenic_dev->cpu_info_buff,"JZ4750V1")) return JZ4750V1;
-	if (!strcmp(ingenic_dev->cpu_info_buff,"Boot4740")) return 3;
+	if (!strcmp(ingenic_dev->cpu_info_buff,"Boot4740")) return BOOT4740;
-	if (!strcmp(ingenic_dev->cpu_info_buff,"Boot4750")) return 4;
+	if (!strcmp(ingenic_dev->cpu_info_buff,"Boot4750")) return BOOT4750;
 
-	return 0;
+	return -1;
 }
 
 int usb_ingenic_flush_cache(struct ingenic_dev *ingenic_dev)
@@ -320,8 +320,10 @@ int usb_ingenic_upload(struct ingenic_dev *ingenic_dev, int stage)
 		rqst = VR_PROGRAM_START2;
 	}
 
+	usleep(100);
 	if (usb_ingenic_start(ingenic_dev, rqst, stage_addr) < 1)
 		return -1;
+	usleep(100);
 	if (usb_get_ingenic_cpu(ingenic_dev) < 1)
 		return -1;
 

usbboot/src/ingenic_usb.h

@@ -37,6 +37,11 @@
 #define VR_CONFIGRATION		0x09
 #define VR_GET_NUM		0x0a
 
+#define JZ4740V1	1
+#define JZ4750V1	2
+#define BOOT4740	3
+#define BOOT4750	4
+
 #define STAGE_ADDR_MSB(addr) ((addr) >> 16)
 #define STAGE_ADDR_LSB(addr) ((addr) & 0xffff)
 
@@ -73,4 +78,3 @@ int usb_ingenic_nand_ops(struct ingenic_dev *ingenic_dev, int ops);
 int usb_read_data_from_ingenic(struct ingenic_dev *ingenic_dev,unsigned char *buff, unsigned int len);
 
 #endif	/* __INGENIC_USB_H__ */
-

usbboot/src/main.c

@@ -26,7 +26,7 @@
 #include "ingenic_usb.h"
 #include "ingenic_cfg.h"
 
-#define CONFIG_FILE_PATH "/etc/xburst-tools/usbboot.cfg"
+#define CONFIG_FILE_PATH (CFGDIR "/usbboot.cfg")
 
 extern struct ingenic_dev ingenic_dev;
 extern struct hand hand;

usbboot/xburst_stage2/Makefile

@@ -29,10 +29,9 @@ DEBUG_CFLAGS = -g -Wa,-a=$(basename $@).lst
 # registers work. Since other register accesses might be affected too it seems the best
 # is to disable this optimization right now.
 CFLAGS	= -mips32 -O2 -fno-exceptions -fno-zero-initialized-in-bss \
-	-ffunction-sections -fomit-frame-pointer -msoft-float -G 0 $(DEBUG_CFLAGS) \
+	-ffunction-sections -fomit-frame-pointer -msoft-float -G 0 -fpie \
 	-I$(XBURST_INCLUDE_PATH) -I$(INFLASH_SRC_PATH)
 LDFLAGS	= -nostdlib -T target.ld $(CFLAGS)
-LIBS	= -lstdc++ -lc -lm -lgcc
 
 OBJS	= main.o udc.o cache.o serial.o boothandler.o nandflash_4740.o nandflash_4750.o
 
@@ -47,8 +46,6 @@ xburst_stage2.elf: head.o $(OBJS)
 
 .c.o:
 	$(CC) $(CFLAGS) -o $@ -c $<
-.cpp.o:
-	$(CC) $(CFLAGS) -fno-rtti -fvtable-gc -o $@ -c $<
 .S.o:
 	$(CC) $(CFLAGS) -o $@ -c $<
 

usbboot/xburst_stage2/boothandler.c

@@ -83,13 +83,6 @@ void config_hand()
 	Hand.nand_eccpos=hand_p->nand_eccpos;
 	Hand.nand_bbpos=hand_p->nand_bbpos;
 	Hand.nand_bbpage=hand_p->nand_bbpage;
-//	memcpy( &Hand.fw_args, (unsigned char *)(start_addr + 0x8), 32 );
-
-//	serial_putc(Hand.nand_eccpos + 48);
-//	serial_putc(Hand.nand_bbpos + 48);
-//	serial_putc(Hand.nand_bbpage + 48);
-	/* dprintf("\n Hand : bw %d rc %d ps %d ppb %d erase %d pn %d os %d", */
-	/* 	Hand.nand_bw,Hand.nand_rc,Hand.nand_ps,Hand.nand_ppb,Hand.nand_force_erase,Hand.nand_pn,Hand.nand_os); */
 	serial_put_hex(Hand.fw_args.cpu_id);
 	serial_put_hex(Hand.fw_args.ext_clk);
 #endif
@@ -98,7 +91,8 @@ void config_hand()
 int GET_CUP_INFO_Handle()
 {
 	char temp1[8]="Boot4740",temp2[8]="Boot4750";
-	dprintf("\n GET_CPU_INFO!");
+	dprintf("\n GET_CPU_INFO:\t");
+	serial_put_hex(Hand.fw_args.cpu_id);
 	if (Hand.fw_args.cpu_id == 0x4740)
 		HW_SendPKT(0, temp1, 8);
 	else
@@ -111,7 +105,7 @@ int SET_DATA_ADDERSS_Handle(u8 *buf)
 {
 	USB_DeviceRequest *dreq = (USB_DeviceRequest *)buf;
 	start_addr=(((u32)dreq->wValue)<<16)+(u32)dreq->wIndex;
-	dprintf("\n SET ADDRESS:");
+	dprintf("\n SET ADDRESS:\t");
 	serial_put_hex(start_addr);
 	return ERR_OK;
 }
@@ -120,7 +114,7 @@ int SET_DATA_LENGTH_Handle(u8 *buf)
 {
 	USB_DeviceRequest *dreq = (USB_DeviceRequest *)buf;
 	ops_length=(((u32)dreq->wValue)<<16)+(u32)dreq->wIndex;
-	dprintf("\n DATA_LENGTH :");
+	dprintf("\n DATA_LENGTH:\t");
 	serial_put_hex(ops_length);
 	return ERR_OK;
 }
@@ -219,20 +213,18 @@ int NAND_OPS_Handle(u8 *buf)
 		}
 		break;
 	case NAND_ERASE:
-		dprintf("\n Request : NAND_ERASE!");
+		dprintf("\n Request : NAND_ERASE");
 		ret_dat = nand_erase(ops_length,start_addr,
 			   Hand.nand_force_erase);
 		handshake_PKT[0] = (u16) ret_dat;
 		handshake_PKT[1] = (u16) (ret_dat>>16);
 		HW_SendPKT(1,handshake_PKT,sizeof(handshake_PKT));
 		udc_state = IDLE;
-		dprintf("\n Request : NAND_ERASE_FINISH!");
+		dprintf(" ... finished.");
 		break;
 	case NAND_READ:
 		dprintf("\n Request : NAND_READ!");
-//		dprintf("\n Option : %x",option);
+		switch (option) {
-		switch (option)
-		{
 		case 	OOB_ECC:
 			ret_dat = nand_read(Bulk_in_buf,start_addr,ops_length,OOB_ECC);
 			handshake_PKT[0] = (u16) ret_dat;
@@ -255,21 +247,20 @@ int NAND_OPS_Handle(u8 *buf)
 			udc_state = BULK_IN;
 			break;
 		}
-		dprintf("\n Request : NAND_READ_FUNISH!");
+		dprintf(" ... finished.");
 		break;
 	case NAND_PROGRAM:
 		dprintf("\n Request : NAND_PROGRAM!");
-//		dprintf("\n Option : %x",option);
 		ret_dat = nand_program((void *)Bulk_out_buf,
 			     start_addr,ops_length,option);
-		dprintf("\n NAND_PROGRAM finish!");
 		handshake_PKT[0] = (u16) ret_dat;
 		handshake_PKT[1] = (u16) (ret_dat>>16);
 		HW_SendPKT(1,handshake_PKT,sizeof(handshake_PKT));
 		udc_state = IDLE;
+		dprintf(" ... finished.");
 		break;
 	case NAND_READ_TO_RAM:
-		dprintf("\n Request : NAND_READNAND!");
+		dprintf("\n Request : NAND_READ_TO_RAM!");
 		nand_read((u8 *)ram_addr,start_addr,ops_length,NO_OOB);
 		__dcache_writeback_all();
 		handshake_PKT[3]=(u16)ERR_OK;
@@ -312,15 +303,9 @@ void Borad_Init()
 	{
 	case 0x4740:
 		//Init nand flash
-		nand_init_4740(Hand.nand_bw,Hand.nand_rc,Hand.nand_ps,Hand.nand_ppb,
+		nand_init_4740(Hand.nand_bw, Hand.nand_rc, Hand.nand_ps, 
-		       Hand.nand_bbpage,Hand.nand_bbpos,Hand.nand_force_erase,Hand.nand_eccpos);
+			       Hand.nand_ppb, Hand.nand_bbpage, Hand.nand_bbpos,
-	
+			       Hand.nand_force_erase, Hand.nand_eccpos);
-		dprintf("\nnand_ps, nand_ppb, nand_bbpage, nand_bbpos, nand_eccpos\n");
-		serial_put_hex(Hand.nand_ps);
-		serial_put_hex(Hand.nand_ppb);
-		serial_put_hex(Hand.nand_bbpage);
-		serial_put_hex(Hand.nand_bbpos);
-		serial_put_hex(Hand.nand_eccpos);
 	
 		nand_program = nand_program_4740;
 		nand_erase = nand_erase_4740;
@@ -355,21 +340,23 @@ void Borad_Init()
 
 int CONFIGRATION_Handle(u8 *buf)
 {
+	dprintf("\n Configuration:\t");
+
 	USB_DeviceRequest *dreq = (USB_DeviceRequest *)buf;
-	switch ((dreq->wValue)&0xf)
+	switch ((dreq->wValue)&0xf) {
-	{
 	case DS_flash_info:
-		dprintf("\n configration :DS_flash_info_t!");
+		dprintf("DS_flash_info_t!");
 		config_flash_info();
 		break;
 
 	case DS_hand:
-		dprintf("\n configration :DS_hand_t!");
+		dprintf("DS_hand_t!");
 		config_hand();
 		break;
-	default:;
+	default:
-		
+		;
 	}
+
 	Borad_Init();
 	return ERR_OK;
 }

usbboot/xburst_stage2/main.c

@@ -57,11 +57,11 @@ void c_main(void)
 	if ( fw_args->use_uart > 3 ) fw_args->use_uart = 0;
 	UART_BASE = 0xB0030000 + fw_args->use_uart * 0x1000;
 
-	serial_puts("Start address is :");
+	serial_puts("\n Stage2 start address is :\t");
 	serial_put_hex(start_addr);
-	serial_puts("Address offset is:");
+	serial_puts("\n Address offset is:\t");
 	serial_put_hex(offset);
-	serial_puts("GOT correct to   :");
+	serial_puts("\n GOT correct to :\t");
 	serial_put_hex(got_start);
 
 	usb_main();

usbboot/xburst_stage2/serial.c

@@ -89,7 +89,7 @@ void serial_init(void)
 
 void serial_put_hex(unsigned int  d)
 {
-	unsigned char c[12];
+	unsigned char c[9];
 	char i;
 	for(i = 0; i < 8; i++)
 	{
@@ -99,7 +99,9 @@ void serial_put_hex(unsigned int  d)
 		else
 			c[i] += (0x41 - 10);
 	}
-	c[8] = '\n';
+
-	c[9] = 0;
+	c[8] = 0;
+
+	serial_puts("0x");
 	serial_puts(c);
 }

xbboot/scripts/boot-uboot.sh

@@ -0,0 +1,12 @@
+#!/bin/bash
+../host-app/xbboot set_addr 0x80002000
+../host-app/xbboot bulk_write ../target-stage1/stage1.bin
+../host-app/xbboot start1 0x80002000
+../host-app/xbboot get_info
+
+../host-app/xbboot flush_cache
+
+../host-app/xbboot set_addr 0x80100000
+../host-app/xbboot bulk_write $1
+../host-app/xbboot flush_cache
+../host-app/xbboot start2 0x80100000

xbboot/scripts/boot-zImage.sh

@@ -0,0 +1,12 @@
+#!/bin/bash
+../host-app/xbboot set_addr 0x80002000
+../host-app/xbboot bulk_write ../target-stage1/stage1.bin
+../host-app/xbboot start1 0x80002000
+../host-app/xbboot get_info
+
+../host-app/xbboot flush_cache
+
+../host-app/xbboot set_addr 0x80600000
+../host-app/xbboot bulk_write $1
+../host-app/xbboot flush_cache
+../host-app/xbboot start2 0x80600000

xbboot/target-echokernel/Makefile

@@ -25,7 +25,7 @@ DEBUG_CFLAGS = -g -Wa,-a=$(basename $@).lst
 # registers work. Since other register accesses might be affected too it seems the best
 # is to disable this optimization right now.
 CFLAGS	= -mips32 -O2 -fno-exceptions -fno-unit-at-a-time -fno-zero-initialized-in-bss \
-	-ffunction-sections -fomit-frame-pointer -msoft-float -G 0 $(DEBUG_CFLAGS)
+	-ffunction-sections -fomit-frame-pointer -msoft-float -G 0 $(DEBUG_CFLAGS) -fPIC
 LDFLAGS	= -nostdlib -T target.ld $(CFLAGS)
 LIBS	= -lstdc++ -lc -lm -lgcc
 VPATH   = ../target-common

xbboot/target-stage1/stage1.c

@@ -35,15 +35,17 @@ void gpio_init();
 void pll_init();
 void serial_init();
 void sdram_init();
+void nand_init();
 
 void c_main(void)
 {
 	load_args();
 	gpio_init();
-	pll_init();
 	serial_init();
+	pll_init();
 	serial_puts("XBurst boot stage1...\n");
 	sdram_init();
+	nand_init();
 	serial_puts("stage 1 finished: GPIO, clocks, SDRAM, UART setup - now jump back to BOOT ROM...\n");
 }
 
@@ -89,7 +91,8 @@ void gpio_init()
 	__gpio_as_nand();
 	__gpio_as_sdram_32bit();
 	__gpio_as_uart0();
-	__gpio_as_uart1();
+	__gpio_as_lcd_18bit();
+	__gpio_as_msc();
 }
 
 void pll_init()
@@ -202,7 +205,14 @@ void sdram_init()
 	REG_EMC_RTCSR = 0;	/* Disable clock for counting */
 
 	/* Fault DMCR value for mode register setting*/
-	dmcr0 = (ARG_BUS_WIDTH_16<<EMC_DMCR_BW_BIT) |
+#define SDRAM_ROW0    11
+#define SDRAM_COL0     8
+#define SDRAM_BANK40   0
+#define SDRAM_BW16     1
+	dmcr0 = ((SDRAM_ROW0-11)<<EMC_DMCR_RA_BIT) |
+		((SDRAM_COL0-8)<<EMC_DMCR_CA_BIT) |
+		(SDRAM_BANK40<<EMC_DMCR_BA_BIT) |
+		(SDRAM_BW16<<EMC_DMCR_BW_BIT) |
 		EMC_DMCR_EPIN |
 		cas_latency_dmcr[((SDRAM_CASL == 3) ? 1 : 0)];
 
@@ -270,3 +280,9 @@ void sdram_init()
 
 	/* everything is ok now */
 }
+
+void nand_init()
+{
+	REG_EMC_SMCR1 = 0x094c4400;
+	REG_EMC_NFCSR |= EMC_NFCSR_NFE1 | EMC_NFCSR_NFCE1; //__nand_enable()
+}