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mirror of git://projects.qi-hardware.com/xburst-tools.git synced 2024-11-01 12:38:27 +02:00

Add support for booting of stage2.

This commit is contained in:
Peter Zotov 2010-12-04 04:36:25 +03:00
parent 3851d0db66
commit db010b1855
4 changed files with 49 additions and 5 deletions

View File

@ -1,6 +1,7 @@
/* /*
* JzBoot: an USB bootloader for JZ series of Ingenic(R) microprocessors. * JzBoot: an USB bootloader for JZ series of Ingenic(R) microprocessors.
* Copyright (C) 2010 Sergey Gridassov <grindars@gmail.com> * Copyright (C) 2010 Sergey Gridassov <grindars@gmail.com>,
* Peter Zotov <whitequark@whitequark.org>
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -36,6 +37,7 @@
typedef struct { typedef struct {
void *usb; void *usb;
uint32_t type; uint32_t type;
uint32_t total_sdram_size;
const ingenic_callbacks_t *callbacks; const ingenic_callbacks_t *callbacks;
void *callbacks_data; void *callbacks_data;
@ -200,7 +202,10 @@ int ingenic_rebuild(void *hndl) {
CFGOPT("START", start, 1); CFGOPT("START", start, 1);
CFGOPT("SIZE", size, 1); CFGOPT("SIZE", size, 1);
handle->total_sdram_size = (uint32_t)
(2 << (handle->cfg.row_addr + handle->cfg.col_addr - 1)) * 2
* (handle->cfg.bank_num + 1) * 2
* (2 - handle->cfg.bus_width);
debug(LEVEL_DEBUG, "Firmware configuration dump:\n"); debug(LEVEL_DEBUG, "Firmware configuration dump:\n");
@ -234,6 +239,12 @@ int ingenic_loadstage(void *hndl, int id, const char *file) {
break; break;
case INGENIC_STAGE2:
base = SDRAM_BASE + handle->total_sdram_size - STAGE2_CODESIZE;
cmd = VR_PROGRAM_START2;
break;
default: default:
errno = EINVAL; errno = EINVAL;
@ -275,6 +286,15 @@ int ingenic_loadstage(void *hndl, int id, const char *file) {
debug(LEVEL_DEBUG, "Ingenic: stage written\n"); debug(LEVEL_DEBUG, "Ingenic: stage written\n");
if(id == INGENIC_STAGE2) {
debug(LEVEL_DEBUG, "Ingenic: flushing cache\n");
ret = usbdev_vendor(handle->usb, USBDEV_TODEV, VR_FLUSH_CACHES, 0, 0, 0, 0);
if(ret == -1)
return -1;
}
debug(LEVEL_DEBUG, "Starting stage!\n"); debug(LEVEL_DEBUG, "Starting stage!\n");
ret = usbdev_vendor(handle->usb, USBDEV_TODEV, cmd, (base >> 16), base & 0xFFFF, 0, 0); ret = usbdev_vendor(handle->usb, USBDEV_TODEV, cmd, (base >> 16), base & 0xFFFF, 0, 0);

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@ -39,6 +39,7 @@ int ingenic_loadstage(void *hndl, int id, const char *filename);
#define INGENIC_STAGE2 2 #define INGENIC_STAGE2 2
#define STAGE1_BASE 0x2000 #define STAGE1_BASE 0x2000
#define STAGE2_CODESIZE 0x400000
#define SDRAM_BASE 0x80000000 #define SDRAM_BASE 0x80000000
typedef struct { typedef struct {

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@ -1,7 +1,8 @@
# Configuration variables: # Configuration variables:
# STAGE1_FILE # STAGE1_FILE, STAGE2_FILE
set STAGE1_FILE fw.bin set STAGE1_FILE fw.bin
set STAGE2_FILE usb_boot.bin
set EXTCLK 12 # Define the external crystal in MHz set EXTCLK 12 # Define the external crystal in MHz
set CPUSPEED 252 # Define the PLL output frequency set CPUSPEED 252 # Define the PLL output frequency

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@ -1,6 +1,7 @@
/* /*
* JzBoot: an USB bootloader for JZ series of Ingenic(R) microprocessors. * JzBoot: an USB bootloader for JZ series of Ingenic(R) microprocessors.
* Copyright (C) 2010 Sergey Gridassov <grindars@gmail.com> * Copyright (C) 2010 Sergey Gridassov <grindars@gmail.com>,
* Peter Zotov <whitequark@whitequark.org>
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -24,16 +25,37 @@
#include "ingenic.h" #include "ingenic.h"
static int spl_memtest(int argc, char *argv[]); static int spl_memtest(int argc, char *argv[]);
static int spl_boot(int argc, char *argv[]);
const shell_command_t spl_cmdset[] = { const shell_command_t spl_cmdset[] = {
{ "memtest", "[BASE <SIZE>] - SDRAM test", spl_memtest }, { "memtest", "[BASE <SIZE>] - SDRAM test", spl_memtest },
{ "boot", " - Load stage2 USB bootloader", spl_boot },
{ NULL, NULL, NULL } { NULL, NULL, NULL }
}; };
static int spl_load_stage1() {
return ingenic_loadstage(shell_device(), INGENIC_STAGE1, cfg_getenv("STAGE1_FILE"));
}
static int spl_memtest(int argc, char *argv[]) { static int spl_memtest(int argc, char *argv[]) {
if(argc != 1 && argc != 3) { if(argc != 1 && argc != 3) {
printf("Usage: %s [BASE <SIZE>]\n", argv[0]); printf("Usage: %s [BASE <SIZE>]\n", argv[0]);
} }
return ingenic_loadstage(shell_device(), INGENIC_STAGE1, cfg_getenv("STAGE1_FILE")); return spl_load_stage1(); // TODO
}
static int spl_boot(int argc, char *argv[]) {
if(argc != 1) {
printf("Usage: %s\n", argv[0]);
}
int ret;
ret = spl_load_stage1();
if(ret == -1)
return -1;
return ingenic_loadstage(shell_device(), INGENIC_STAGE2, cfg_getenv("STAGE2_FILE"));
} }