mirror of
git://projects.qi-hardware.com/xburst-tools.git
synced 2024-11-22 13:41:32 +02:00
add init serial console in serial.c
This commit is contained in:
xiangfu
parent
07ac5def3b
commit
dded3f8cbf
@ -37,5 +37,6 @@
|
||||
int orange_on(int times);
|
||||
int blue_on(int times);
|
||||
int blink_led(void);
|
||||
int delay(int time);
|
||||
|
||||
#endif /* __BLINK_LED_H */
|
||||
|
||||
@ -20,9 +20,44 @@
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#define rUTXH0 (*(volatile unsigned char *)0x50000023)
|
||||
#define UTRSTAT (*(volatile unsigned char *)0x50000010)
|
||||
#define UART0 0
|
||||
#define UART1 1
|
||||
#define UART2 2
|
||||
|
||||
void serial_putc (const char c);
|
||||
#define rULCON0 (*(volatile unsigned *)0x50000000) /*UART 0 Line control*/
|
||||
#define rUCON0 (*(volatile unsigned *)0x50000004) /*UART 0 Control*/
|
||||
#define rUFCON0 (*(volatile unsigned *)0x50000008) /*UART 0 FIFO control*/
|
||||
#define rUMCON0 (*(volatile unsigned *)0x5000000c) /*UART 0 Modem control*/
|
||||
#define rUTRSTAT0 (*(volatile unsigned *)0x50000010) /*UART 0 Tx/Rx status*/
|
||||
#define rUERSTAT0 (*(volatile unsigned *)0x50000014) /*UART 0 Rx error status*/
|
||||
#define rUFSTAT0 (*(volatile unsigned *)0x50000018) /*UART 0 FIFO status*/
|
||||
#define rUMSTAT0 (*(volatile unsigned *)0x5000001c) /*UART 0 Modem status*/
|
||||
#define rUBRDIV0 (*(volatile unsigned *)0x50000028) /*UART 0 Baud rate divisor*/
|
||||
|
||||
#define rULCON1 (*(volatile unsigned *)0x50004000) /*UART 1 Line control*/
|
||||
#define rUCON1 (*(volatile unsigned *)0x50004004) /*UART 1 Control*/
|
||||
#define rUFCON1 (*(volatile unsigned *)0x50004008) /*UART 1 FIFO control*/
|
||||
#define rUMCON1 (*(volatile unsigned *)0x5000400c) /*UART 1 Modem control*/
|
||||
#define rUTRSTAT1 (*(volatile unsigned *)0x50004010) /*UART 1 Tx/Rx status*/
|
||||
#define rUERSTAT1 (*(volatile unsigned *)0x50004014) /*UART 1 Rx error status*/
|
||||
#define rUFSTAT1 (*(volatile unsigned *)0x50004018) /*UART 1 FIFO status*/
|
||||
#define rUMSTAT1 (*(volatile unsigned *)0x5000401c) /*UART 1 Modem status*/
|
||||
#define rUBRDIV1 (*(volatile unsigned *)0x50004028) /*UART 1 Baud rate divisor*/
|
||||
|
||||
#define rULCON2 (*(volatile unsigned *)0x50008000) /*UART 2 Line control*/
|
||||
#define rUCON2 (*(volatile unsigned *)0x50008004) /*UART 2 Control*/
|
||||
#define rUFCON2 (*(volatile unsigned *)0x50008008) /*UART 2 FIFO control*/
|
||||
#define rUTRSTAT2 (*(volatile unsigned *)0x50008010) /*UART 2 Tx/Rx status*/
|
||||
#define rUERSTAT2 (*(volatile unsigned *)0x50008014) /*UART 2 Rx error status*/
|
||||
#define rUFSTAT2 (*(volatile unsigned *)0x50008018) /*UART 2 FIFO status*/
|
||||
#define rUBRDIV2 (*(volatile unsigned *)0x50008028) /*UART 2 Baud rate divisor*/
|
||||
|
||||
#define WrUTXH0(ch) (*(volatile unsigned char *)0x50000020)=(unsigned char)(ch)
|
||||
#define RdURXH0() (*(volatile unsigned char *)0x50000024)
|
||||
#define WrUTXH1(ch) (*(volatile unsigned char *)0x50004020)=(unsigned char)(ch)
|
||||
#define RdURXH1() (*(volatile unsigned char *)0x50004024)
|
||||
#define WrUTXH2(ch) (*(volatile unsigned char *)0x50008020)=(unsigned char)(ch)
|
||||
#define RdURXH2() (*(volatile unsigned char *)0x50008024)
|
||||
|
||||
void serial_init (const int ubrdiv_val,const int uart);
|
||||
void serial_putc (const int uart,const char c);
|
||||
|
||||
@ -15,11 +15,7 @@
|
||||
* Author: Harald Welte <laforge@openmoko.org>
|
||||
*/
|
||||
|
||||
/*#include <common.h>
|
||||
#include <linux/mtd/nand.h>
|
||||
*/
|
||||
#include "nand_read.h"
|
||||
#include "blink_led.h"
|
||||
|
||||
#define NAND_CMD_READ0 0
|
||||
#define NAND_CMD_READSTART 0x30
|
||||
@ -108,6 +104,7 @@ static int nand_read_page_ll(unsigned char *buf, unsigned long addr)
|
||||
int nand_read_ll(unsigned char *buf, unsigned long start_addr, int size)
|
||||
{
|
||||
int i, j;
|
||||
int bad_count = 0;
|
||||
|
||||
if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK))
|
||||
return -1; /* invalid alignment */
|
||||
@ -121,13 +118,15 @@ int nand_read_ll(unsigned char *buf, unsigned long start_addr, int size)
|
||||
if (i % NAND_BLOCK_SIZE == 0) {
|
||||
if (is_bad_block(i) ||
|
||||
is_bad_block(i + NAND_PAGE_SIZE)) {
|
||||
orange_on(1);
|
||||
i += NAND_BLOCK_SIZE;
|
||||
size += NAND_BLOCK_SIZE;
|
||||
if(bad_count++ == 4) {
|
||||
return -1;
|
||||
}
|
||||
continue;
|
||||
}
|
||||
}
|
||||
blue_on(1);
|
||||
|
||||
j = nand_read_page_ll(buf, i);
|
||||
i += j;
|
||||
/* buf += j;*/
|
||||
|
||||
@ -20,14 +20,60 @@
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
# include <serial.h>
|
||||
#include "serial.h"
|
||||
#include "blink_led.h"
|
||||
|
||||
void serial_init (const int ubrdiv_val,const int uart)
|
||||
{
|
||||
switch(uart)
|
||||
{
|
||||
case UART0:
|
||||
rULCON0 = 0x3;
|
||||
rUCON0 = 0x245;
|
||||
rUFCON0 = 0x0;
|
||||
rUMCON0 = 0x0;
|
||||
rUBRDIV0 = ubrdiv_val;
|
||||
break;
|
||||
case UART1:
|
||||
rULCON1 = 0x3;
|
||||
rUCON1 = 0x245;
|
||||
rUFCON1 = 0x0;
|
||||
rUMCON1 = 0x0;
|
||||
rUBRDIV1 = ubrdiv_val;
|
||||
break;
|
||||
case UART2:
|
||||
rULCON2 = 0x3;
|
||||
rUCON2 = 0x245;
|
||||
rUFCON2 = 0x0;
|
||||
rUBRDIV2 = ubrdiv_val;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
/*
|
||||
* Output a single byte to the serial port.
|
||||
*/
|
||||
void serial_putc (const char c)
|
||||
void serial_putc (const int uart,const char c)
|
||||
{
|
||||
while (!(UTRSTAT & 0x2));
|
||||
|
||||
rUTXH0 = c;
|
||||
switch(uart)
|
||||
{
|
||||
case UART0:
|
||||
while ( !( rUTRSTAT0 & 0x2 ) );
|
||||
delay(10);
|
||||
WrUTXH0(c);
|
||||
break;
|
||||
case UART1:
|
||||
while ( !( rUTRSTAT1 & 0x2 ) );
|
||||
delay(10);
|
||||
WrUTXH1(c);
|
||||
break;
|
||||
case UART2:
|
||||
while ( !( rUTRSTAT2 & 0x2 ) );
|
||||
WrUTXH2(c);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -46,17 +46,19 @@ start_code:
|
||||
orr r0,r0,#0xd3
|
||||
msr cpsr,r0
|
||||
|
||||
/* turn off the watchdog */
|
||||
# define pWTCON 0x53000000
|
||||
|
||||
ldr r0, =pWTCON
|
||||
mov r1, #0x0
|
||||
str r1, [r0]
|
||||
|
||||
/*
|
||||
* mask all IRQs by setting all bits in the INTMR - default
|
||||
*/
|
||||
# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
|
||||
# define INTSUBMSK 0x4A00001C
|
||||
# define INTSUBMSK_val 0xffff
|
||||
# define INTSUBMSK_val 0x0000ffff
|
||||
|
||||
mov r1, #0xffffffff
|
||||
ldr r0, =INTMSK
|
||||
str r1, [r0]
|
||||
@ -65,8 +67,10 @@ start_code:
|
||||
ldr r0, =INTSUBMSK
|
||||
str r1, [r0]
|
||||
|
||||
|
||||
/* Make sure we get FCLK:HCLK:PCLK = 1:3:6 */
|
||||
# define CAMDIVN 0x4C000018
|
||||
|
||||
ldr r0, =CAMDIVN
|
||||
mov r1, #0
|
||||
str r1, [r0]
|
||||
@ -76,21 +80,21 @@ start_code:
|
||||
orr r1, r1, #0xc0000000
|
||||
mcr p15, 0, r1, c1, c0, 0
|
||||
|
||||
# define LOCKTIME 0x4c000000
|
||||
# define UPLLCON 0x4c000008
|
||||
# define UPLLCON_val (( 88 << 12) + (8 << 4) + 2)
|
||||
# define MPLLCON 0x4c000004
|
||||
# define MPLLCON_val ((142 << 12) + (7 << 4) + 1)
|
||||
#define LOCKTIME 0x4c000000
|
||||
|
||||
ldr r0, =LOCKTIME
|
||||
mov r1, #0xffffff
|
||||
str r1, [r0]
|
||||
|
||||
# define MPLLCON_val ((142 << 12) + (7 << 4) + 1)
|
||||
# define UPLLCON 0x4c000008
|
||||
# define UPLLCON_val (( 88 << 12) + (8 << 4) + 2)
|
||||
|
||||
ldr r0, =UPLLCON
|
||||
ldr r1, =UPLLCON_val
|
||||
str r1, [r0]
|
||||
|
||||
/* Page 7-23 in s3c2442B manual, seven nops between UPLL and MPLL */
|
||||
/* Page 7-19, seven nops between UPLL and MPLL */
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
@ -99,49 +103,46 @@ start_code:
|
||||
nop
|
||||
nop
|
||||
|
||||
ldr r0, =MPLLCON
|
||||
ldr r1, =MPLLCON_val
|
||||
str r1, [r0] /* MPLLCON */
|
||||
str r1, [r0, #-4] /* MPLLCON */
|
||||
|
||||
# define CLKDIVN 0x4C000014 /* clock divisor register */
|
||||
# define CLKDIVN_val 7 /* FCLK:HCLK:PCLK = 1:3:6 */
|
||||
|
||||
/* FCLK:HCLK:PCLK = 1:3:6 */
|
||||
ldr r0, =CLKDIVN
|
||||
mov r1, #CLKDIVN_val
|
||||
str r1, [r0]
|
||||
|
||||
/* enable uart */
|
||||
ldr r0, =0x4c00000c /* clkcon */
|
||||
ldr r1, =0x7fff0 /* all clocks on */
|
||||
ldr r1, =0xffff0 /* all clocks on */
|
||||
str r1, [r0]
|
||||
|
||||
/* gpio UART0 init */
|
||||
ldr r0, =0x56000070
|
||||
mov r1, #0xaa
|
||||
ldr r1, =0x2afaaa
|
||||
str r1, [r0]
|
||||
|
||||
/* init uart */
|
||||
ldr r0, =0x50000000
|
||||
/* init uart0 */
|
||||
/* ldr r0, =0x50000000
|
||||
mov r1, #0x03
|
||||
str r1, [r0]
|
||||
ldr r1, =0x245
|
||||
str r1, [r0, #0x04]
|
||||
mov r1, #0x01
|
||||
mov r1, #0x00
|
||||
str r1, [r0, #0x08]
|
||||
mov r1, #0x00
|
||||
str r1, [r0, #0x0c]
|
||||
mov r1, #0x1a
|
||||
str r1, [r0, #0x28]
|
||||
mov r1, #0x11
|
||||
str r1, [r0, #0x28] */
|
||||
|
||||
bl cpu_init_crit
|
||||
/* >> CFG_VIDEO_LOGO_MAX_SIZE */
|
||||
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
|
||||
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
|
||||
#define CONFIG_STACKSIZE_IRQ (8*1024) /* IRQ stack */
|
||||
#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
|
||||
stack_setup:
|
||||
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
|
||||
sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
|
||||
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
|
||||
sub sp, r0, #12 /* leave 3 words for abort-stack */
|
||||
|
||||
clear_bss:
|
||||
|
||||
@ -33,17 +33,20 @@ unsigned char buf[]={
|
||||
0x10,0x00,0x00,0x56,0x18,0x00,0x00,0x56,0xff,0xff,0x00,0x00,0x14,0x00,0x00,0x56,
|
||||
0x01,0x00,0x50,0xe2,0xfd,0xff,0xff,0x1a,0x0e,0xf0,0xa0,0xe1,0x0a};
|
||||
*/
|
||||
unsigned char buf[2048];
|
||||
unsigned char buf[2*1024];
|
||||
|
||||
#define ADDR ((volatile unsigned *)&buf)
|
||||
|
||||
int start_kboot(void)
|
||||
{
|
||||
/*1 say hello to uart */
|
||||
serial_putc ('a');
|
||||
serial_init(0x11,UART0);
|
||||
while(1){
|
||||
serial_putc (UART0,'0');
|
||||
blue_on(1);
|
||||
}
|
||||
|
||||
/*2. test nand flash */
|
||||
if(nand_read_ll(buf, 0x40000, sizeof(buf))==-1) {
|
||||
if(nand_read_ll(buf, 0x000, sizeof(buf))==-1) {
|
||||
while(1) {
|
||||
blink_led();
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user