mirror of
git://projects.qi-hardware.com/xburst-tools.git
synced 2024-11-22 23:21:53 +02:00
407 lines
8.7 KiB
C
407 lines
8.7 KiB
C
#ifndef __CONFIGS_H__
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#define __CONFIGS_H__
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#include "include.h"
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np_data config_list[]=
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{
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{
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//No 0
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//The config for jz4730 uboot
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.pt = JZ4730,
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.et = HARDHM, //HW HM ECC
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.ep = 0, //ecc position index 0
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.bw = 8,
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.ps = 2048,
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.os = 64,
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.ppb = 64,
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.rc = 3,
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.bbp = 0,
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.bba = 0,
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.ebase = 0x13010000,
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.dport = 0x14000000,
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.gport = 0,
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.bm_ms = 0x100,
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.pm_ms = 0xb0000,
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.gm_ms = 0,
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.ap_offset = 0x80000,
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.cp_offset = 0x40000,
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.nand_init = nand_init_4730,
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.nand_erase = nand_erase_4730,
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.nand_program = nand_program_4730,
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.nand_read = nand_read_4730,
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.nand_read_oob = nand_read_oob_4730,
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.nand_block_markbad = nand_block_markbad,
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.nand_check = nand_check_cmp,
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.nand_check_block = nand_check_block,
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.nand_select = chip_select_4730,
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},
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{
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//No 1
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//The config for jz4730 linux fs
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.pt = JZ4730,
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.et = HARDHM, //HW HM ECC
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.ep = 1, //ecc position index 1
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.bw = 8,
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.ps = 2048,
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.os = 64,
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.ppb = 64,
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.rc = 3,
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.bbp = 0,
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.bba = 0,
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.ebase = 0x13010000,
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.dport = 0x14000000,
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.gport = 0,
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.bm_ms = 0x100,
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.pm_ms = 0xb0000,
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.gm_ms = 0,
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.ap_offset = 0x80000,
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.cp_offset = 0x40000,
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.nand_init = nand_init_4730,
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.nand_erase = nand_erase_4730,
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.nand_program = nand_program_4730,
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.nand_read = nand_read_4730,
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.nand_read_oob = nand_read_oob_4730,
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.nand_block_markbad = nand_block_markbad,
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.nand_check = nand_check_cmp,
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.nand_check_block = nand_check_block,
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.nand_select = chip_select_4730,
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},
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{
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//No 2
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//The config for jz4730 ucos
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.pt = JZ4730,
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.et = HARDHM, //HW HM ECC
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.ep = 1, //need modify
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.bw = 8,
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.ps = 2048,
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.os = 64,
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.ppb = 64,
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.rc = 3,
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.bbp = 0, //need modify
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.bba = 0, //need modify
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//do not need modify
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.ebase = 0x13010000,
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.dport = 0x14000000,
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.gport = 0,
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.bm_ms = 0x100,
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.pm_ms = 0xb0000,
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.gm_ms = 0,
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.ap_offset = 0x80000,
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.cp_offset = 0x40000,
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.nand_init = nand_init_4730,
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.nand_erase = nand_erase_4730,
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.nand_program = nand_program_4730,
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.nand_read = nand_read_4730,
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.nand_read_oob = nand_read_oob_4730,
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.nand_block_markbad = nand_block_markbad,
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.nand_check = nand_check_cmp,
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.nand_check_block = nand_check_block,
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.nand_select = chip_select_4730,
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},
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{
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//No 3
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//The config for jz4730 wince
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.pt = JZ4730,
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.et = HARDHM, //HW HM ECC
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.ep = 1, //need modify
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.bw = 8,
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.ps = 2048,
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.os = 64,
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.ppb = 64,
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.rc = 3,
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.bbp = 0, //need modify
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.bba = 0, //need modify
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//do not need modify
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.ebase = 0x13010000,
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.dport = 0x14000000,
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.gport = 0,
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.bm_ms = 0x100,
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.pm_ms = 0xb0000,
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.gm_ms = 0,
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.ap_offset = 0x80000,
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.cp_offset = 0x40000,
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.nand_init = nand_init_4730,
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.nand_erase = nand_erase_4730,
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.nand_program = nand_program_4730,
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.nand_read = nand_read_4730,
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.nand_read_oob = nand_read_oob_4730,
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.nand_block_markbad = nand_block_markbad,
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.nand_check = nand_check_cmp,
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.nand_check_block = nand_check_block,
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.nand_select = chip_select_4730,
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},
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{
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//No 4
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//The config for jz4740 uboot use HW RS
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.pt = JZ4740,
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.et = HARDRS, //HW HM ECC
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.ep = 2, //need modify
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.bw = 8,
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.ps = 2048,
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.os = 64,
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.ppb = 128,
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.rc = 3,
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.bbp = 0, //need modify
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.bba = 0, //need modify
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//do not need modify
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.ebase = 0x13010000,
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.dport = 0x18000000,
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.gport = 0x10010000,
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.bm_ms = 0x100,
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.pm_ms = 0x20000,
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.gm_ms = 0x500,
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.ap_offset = 0x10000,
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.cp_offset = 0x8000,
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.nand_init = nand_init_4740,
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.nand_erase = nand_erase_4740,
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.nand_program = nand_program_4740,
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.nand_read = nand_read_4740_rs,
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.nand_read_oob = nand_read_oob_4740,
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.nand_block_markbad = nand_block_markbad_4740,
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.nand_check = nand_check_cmp,
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.nand_check_block = nand_check_block_4740,
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.nand_select = chip_select_4740,
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},
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{
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//No 5
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//The config for jz4740 linux use HW RS
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.pt = JZ4740,
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.et = HARDRS, //HW HM ECC
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.ep = 3, //need modify
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.bw = 8,
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.ps = 2048,
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.os = 64,
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.ppb = 128,
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.rc = 3,
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.bbp = 1, //need modify
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.bba = 0, //need modify
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//do not need modify
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.ebase = 0x13010000,
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.dport = 0x18000000,
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.gport = 0x10010000,
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.bm_ms = 0x100,
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.pm_ms = 0x20000,
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.gm_ms = 0x500,
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.ap_offset = 0x10000,
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.cp_offset = 0x8000,
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.nand_init = nand_init_4740,
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.nand_fini = nand_fini_4740,
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.nand_erase = nand_erase_4740,
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.nand_program = nand_program_4740,
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.nand_read = nand_read_4740_rs,
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.nand_read_oob = nand_read_oob_4740,
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.nand_block_markbad = nand_block_markbad_4740,
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.nand_check = nand_check_cmp,
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.nand_check_block = nand_check_block_4740,
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.nand_select = chip_select_4740,
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},
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{
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//No 6
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//The config for jz4740 linux use HW HM
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.pt = JZ4740,
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.et = HARDHM, //HW HM ECC
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.ep = 1, //need modify
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.bw = 8,
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.ps = 2048,
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.os = 64,
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.ppb = 128,
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.rc = 3,
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.bbp = 0, //need modify
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.bba = 0, //need modify
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//do not need modify
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.ebase = 0x13010000,
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.dport = 0x18000000,
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.gport = 0x10010000,
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.bm_ms = 0x100,
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.pm_ms = 0x20000,
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.gm_ms = 0x500,
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.ap_offset = 0x10000,
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.cp_offset = 0x8000,
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.nand_init = nand_init_4740,
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.nand_erase = nand_erase_4740,
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.nand_program = nand_program_4740,
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.nand_read = nand_read_4740_hm,
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.nand_read_oob = nand_read_oob_4740,
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.nand_block_markbad = nand_block_markbad_4740,
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.nand_check = nand_check_cmp,
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.nand_check_block = nand_check_block_4740,
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.nand_select = chip_select_4740,
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},
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{
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//No 7
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//The config for jz4740 ucos use HW RS
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.pt = JZ4740,
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.et = HARDRS, //HW HM ECC
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// .ep = 3, //need modify
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.bw = 8,
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.ps = 2048,
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.os = 64,
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.ppb = 128,
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.rc = 3,
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// .bbp = 0, //need modify
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// .bba = 0, //need modify
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//do not need modify
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.ebase = 0x13010000,
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.dport = 0x18000000,
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.gport = 0x10010000,
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.bm_ms = 0x100,
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.pm_ms = 0x20000,
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.gm_ms = 0x500,
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.ap_offset = 0x10000,
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.cp_offset = 0x8000,
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.nand_init = nand_init_4740,
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.nand_erase = nand_erase_4740,
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.nand_program = nand_program_4740,
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.nand_read = nand_read_4740_rs,
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.nand_read_oob = nand_read_oob_4740,
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.nand_block_markbad = nand_block_markbad_4740,
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.nand_check = nand_check_cmp,
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.nand_check_block = nand_check_block_4740,
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.nand_select = chip_select_4740,
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},
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{
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//No 8
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//The config for jz4740 ucos use HW HM
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.pt = JZ4740,
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.et = HARDHM, //HW HM ECC
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// .ep = 3, //need modify
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.bw = 8,
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.ps = 2048,
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.os = 64,
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.ppb = 128,
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.rc = 3,
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// .bbp = 0, //need modify
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// .bba = 0, //need modify
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//do not need modify
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.ebase = 0x13010000,
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.dport = 0x18000000,
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.gport = 0x10010000,
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.bm_ms = 0x100,
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.pm_ms = 0x20000,
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.gm_ms = 0x500,
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.ap_offset = 0x10000,
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.cp_offset = 0x8000,
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.nand_init = nand_init_4740,
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.nand_erase = nand_erase_4740,
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.nand_program = nand_program_4740,
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.nand_read = nand_read_4740_hm,
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.nand_read_oob = nand_read_oob_4740,
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.nand_block_markbad = nand_block_markbad_4740,
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.nand_check = nand_check_cmp,
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.nand_check_block = nand_check_block_4740,
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.nand_select = chip_select_4740,
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},
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{
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//No 9
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//The config for jz4740 wince use HW RS
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.pt = JZ4740,
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.et = HARDRS, //HW HM ECC
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// .ep = 3, //need modify
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.bw = 8,
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.ps = 2048,
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.os = 64,
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.ppb = 128,
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.rc = 3,
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// .bbp = 0, //need modify
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// .bba = 0, //need modify
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//do not need modify
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.ebase = 0x13010000,
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.dport = 0x18000000,
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.gport = 0x10010000,
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.bm_ms = 0x100,
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.pm_ms = 0x20000,
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.gm_ms = 0x500,
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.ap_offset = 0x10000,
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.cp_offset = 0x8000,
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.nand_init = nand_init_4740,
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.nand_erase = nand_erase_4740,
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.nand_program = nand_program_4740,
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.nand_read = nand_read_4740_rs,
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.nand_read_oob = nand_read_oob_4740,
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.nand_block_markbad = nand_block_markbad_4740,
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.nand_check = nand_check_cmp,
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.nand_check_block = nand_check_block_4740,
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.nand_select = chip_select_4740,
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},
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{
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//No 10
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//The config for jz4740 wince use HW RS
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.pt = JZ4740,
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.et = HARDHM, //HW HM ECC
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// .ep = 3, //need modify
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.bw = 8,
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.ps = 2048,
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.os = 64,
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.ppb = 128,
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.rc = 3,
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// .bbp = 0, //need modify
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// .bba = 0, //need modify
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//do not need modify
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.ebase = 0x13010000,
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.dport = 0x18000000,
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.gport = 0x10010000,
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.bm_ms = 0x100,
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.pm_ms = 0x20000,
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.gm_ms = 0x500,
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.ap_offset = 0x10000,
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.cp_offset = 0x8000,
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.nand_init = nand_init_4740,
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.nand_erase = nand_erase_4740,
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.nand_program = nand_program_4740,
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.nand_read = nand_read_4740_hm,
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.nand_read_oob = nand_read_oob_4740,
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.nand_block_markbad = nand_block_markbad_4740,
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.nand_check = nand_check_cmp,
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.nand_check_block = nand_check_block_4740,
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.nand_select = chip_select_4740,
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},
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};
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#endif
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