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git://projects.qi-hardware.com/xburst-tools.git
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65087a264e
Introduce generic bitbang I2C system, and a s3c24xx-specific implementation of it that knows which GPIO pins and how to control them. The generic bitbang stuff exposes synchronous (ie, it will return when it is done) and asynchronous read and write APIs, allowing the delay between bits to be hidden in other slow, looping code if necessary. Signed-off-by: Andy Green <andy@openmoko.com>
102 lines
2.7 KiB
C
102 lines
2.7 KiB
C
/*
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* (C) Copyright 2007 OpenMoko, Inc.
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* Author: Andy Green <andy@openmoko.com>
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*
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* Generic i2c bitbang state machine
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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/* controls symbol sequencing on i2c */
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enum i2c_bitbang_control {
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IBCONTROL_DO_START = -1,
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IBCONTROL_DO_STOP = -2,
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IBCONTROL_DO_READ = -3,
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IBCONTROL_COMPLETE = -4
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};
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/* control intra-bit and byte states */
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enum i2c_bitbang_states {
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IBS_INIT,
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IBS_START1,
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IBS_START2,
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IBS_ADS_TX_S,
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IBS_ADS_TX_H,
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IBS_ADS_TX_L,
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IBS_ADS_TX_ACK_H,
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IBS_ADS_TX_ACK_L,
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IBS_DATA_RX_S,
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IBS_DATA_RX_H,
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IBS_DATA_RX_L,
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IBS_DATA_RX_ACK_H,
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IBS_DATA_RX_ACK_L,
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IBS_STOP1,
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IBS_STOP2,
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IBS_STOP3
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};
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/* context for bitbang GPIO pins and transaction */
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struct i2c_bitbang {
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enum i2c_bitbang_states state;
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int count;
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unsigned int data[8]; /* read result found here */
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int index;
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int index_read;
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char (*read_sda)(void);
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/* data = 0 = op low, 1 == inp */
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void (*set)(char clock, char data);
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/* delay > 1 half-bit time, used by i2c_complete_synchronously() */
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void (*spin)(void);
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void (*close)(void);
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};
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/* synchronous read and write functions spin until completed or failed
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* i2c_read_sync returns -1 for fail or byte result from device
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*/
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extern int i2c_read_sync(struct i2c_bitbang * bb, unsigned char ads7,
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unsigned char reg);
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extern void i2c_write_sync(struct i2c_bitbang * bb, unsigned char ads7,
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unsigned char reg, unsigned char data);
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/*
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* set up an asynchronous read or write transaction
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*/
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extern void i2c_read(struct i2c_bitbang * bb, unsigned char ads7,
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unsigned char reg);
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extern void i2c_write(struct i2c_bitbang * bb, unsigned char ads7,
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unsigned char reg, unsigned char data);
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/*
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* after setting up a read or write transaction above, you loop calling this
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* with >= 1.25us (400kHz) or >= 5us (100kHz) delay between calls. You don't
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* have to spin but can do something useful if you know it will take more than
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* an i2c bit-time, hiding the time for the i2c transaction completely.
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*/
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extern int i2c_next_state(struct i2c_bitbang * bb); /* return !=0 = completed */
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